diff mbox series

[RESEND,v2,05/22] arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c

Message ID 20201110064439.9683-6-elly.siew.chin.lim@intel.com
State New
Delegated to: Simon Goldschmidt
Headers show
Series Add Intel Diamond Mesa SoC support | expand

Commit Message

Lim, Elly Siew Chin Nov. 10, 2020, 6:44 a.m. UTC
Rename to common file name to used by all SOC64 devices.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
---
 arch/arm/mach-socfpga/Makefile                                        | 4 ++--
 .../mach-socfpga/{wrap_pll_config_s10.c => wrap_pll_config_soc64.c}   | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)
 rename arch/arm/mach-socfpga/{wrap_pll_config_s10.c => wrap_pll_config_soc64.c} (96%)

Comments

Tan, Ley Foon Nov. 13, 2020, 3:52 a.m. UTC | #1
> -----Original Message-----
> From: Lim, Elly Siew Chin <elly.siew.chin.lim@intel.com>
> Sent: Tuesday, November 10, 2020 2:44 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut <marex@denx.de>; Tan, Ley Foon
> <ley.foon.tan@intel.com>; See, Chin Liang <chin.liang.see@intel.com>;
> Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>; Chee, Tien Fong
> <tien.fong.chee@intel.com>; Westergreen, Dalon
> <dalon.westergreen@intel.com>; Simon Glass <sjg@chromium.org>; Gan,
> Yau Wai <yau.wai.gan@intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim@intel.com>
> Subject: [RESEND v2 05/22] arm: socfpga: Changed wrap_pll_config_s10.c to
> wrap_pll_config_soc64.c
> 
> Rename to common file name to used by all SOC64 devices.
> 
> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
> ---
>  arch/arm/mach-socfpga/Makefile                                        | 4 ++--
>  .../mach-socfpga/{wrap_pll_config_s10.c => wrap_pll_config_soc64.c}   | 2
> +-
>  2 files changed, 3 insertions(+), 3 deletions(-)  rename arch/arm/mach-
> socfpga/{wrap_pll_config_s10.c => wrap_pll_config_soc64.c} (96%)

Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>

Regards
Ley Foon
diff mbox series

Patch

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 0b05283a7a..fc3b809afd 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -37,7 +37,7 @@  obj-y	+= reset_manager_s10.o
 obj-y	+= system_manager_s10.o
 obj-y	+= timer_s10.o
 obj-y	+= wrap_pinmux_config_s10.o
-obj-y	+= wrap_pll_config_s10.o
+obj-y	+= wrap_pll_config_soc64.o
 endif
 
 ifdef CONFIG_TARGET_SOCFPGA_AGILEX
@@ -50,7 +50,7 @@  obj-y	+= reset_manager_s10.o
 obj-y	+= system_manager_s10.o
 obj-y	+= timer_s10.o
 obj-y	+= wrap_pinmux_config_s10.o
-obj-y	+= wrap_pll_config_s10.o
+obj-y	+= wrap_pll_config_soc64.o
 endif
 
 ifdef CONFIG_SPL_BUILD
diff --git a/arch/arm/mach-socfpga/wrap_pll_config_s10.c b/arch/arm/mach-socfpga/wrap_pll_config_soc64.c
similarity index 96%
rename from arch/arm/mach-socfpga/wrap_pll_config_s10.c
rename to arch/arm/mach-socfpga/wrap_pll_config_soc64.c
index 6a0d6b5ead..a3087cd0eb 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config_s10.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config_soc64.c
@@ -1,6 +1,6 @@ 
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
+ * Copyright (C) 2016-2020 Intel Corporation <www.intel.com>
  *
  */