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[82.236.8.43]) by smtp.gmail.com with ESMTPSA id a128sm1365176wmf.5.2020.11.06.01.30.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Nov 2020 01:30:02 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Cc: u-boot-amlogic@groups.io, Neil Armstrong Subject: [PATCH 3/3] ARM: dts: meson-sm1: add u-boot specific MMC controller compatible Date: Fri, 6 Nov 2020 10:27:55 +0100 Message-Id: <20201106092755.2250773-4-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201106092755.2250773-1-narmstrong@baylibre.com> References: <20201106092755.2250773-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean In order to enable the Amlogic SM1 MMC controller fix, we need to add a u-boot specific MMC controller compatible. This adds a new meson-sm1-u-boot.dtsi and reworks the other -u-boot.dtsi to use this for SM1 based boards. Signed-off-by: Neil Armstrong --- .../meson-g12b-a311d-khadas-vim3-u-boot.dtsi | 1 + arch/arm/dts/meson-khadas-vim3-u-boot.dtsi | 2 -- .../dts/meson-sm1-khadas-vim3l-u-boot.dtsi | 1 + arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi | 2 +- arch/arm/dts/meson-sm1-sei610-u-boot.dtsi | 2 +- arch/arm/dts/meson-sm1-u-boot.dtsi | 20 +++++++++++++++++++ 6 files changed, 24 insertions(+), 4 deletions(-) create mode 100644 arch/arm/dts/meson-sm1-u-boot.dtsi diff --git a/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi index f66eca14b1..489efa150a 100644 --- a/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi +++ b/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi @@ -4,4 +4,5 @@ * Author: Neil Armstrong */ +#include "meson-g12-common-u-boot.dtsi" #include "meson-khadas-vim3-u-boot.dtsi" diff --git a/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi index b5da4fdfc3..81fd5be378 100644 --- a/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi +++ b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi @@ -4,8 +4,6 @@ * Author: Neil Armstrong */ -#include "meson-g12-common-u-boot.dtsi" - / { aliases { spi0 = &spifc; diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi b/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi index f66eca14b1..a591c0c9f2 100644 --- a/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi +++ b/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi @@ -4,4 +4,5 @@ * Author: Neil Armstrong */ +#include "meson-sm1-u-boot.dtsi" #include "meson-khadas-vim3-u-boot.dtsi" diff --git a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi index 2a8f0545b1..c431988075 100644 --- a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi +++ b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi @@ -4,7 +4,7 @@ * Author: Neil Armstrong */ -#include "meson-g12-common-u-boot.dtsi" +#include "meson-sm1-u-boot.dtsi" ðmac { snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; diff --git a/arch/arm/dts/meson-sm1-sei610-u-boot.dtsi b/arch/arm/dts/meson-sm1-sei610-u-boot.dtsi index 236f2468dc..8ebc1caa4a 100644 --- a/arch/arm/dts/meson-sm1-sei610-u-boot.dtsi +++ b/arch/arm/dts/meson-sm1-sei610-u-boot.dtsi @@ -4,4 +4,4 @@ * Author: Neil Armstrong */ -#include "meson-g12-common-u-boot.dtsi" +#include "meson-sm1-u-boot.dtsi" diff --git a/arch/arm/dts/meson-sm1-u-boot.dtsi b/arch/arm/dts/meson-sm1-u-boot.dtsi new file mode 100644 index 0000000000..e05d4c369a --- /dev/null +++ b/arch/arm/dts/meson-sm1-u-boot.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 BayLibre, SAS. + * Author: Neil Armstrong + */ + +#include "meson-g12-common-u-boot.dtsi" + +&sd_emmc_a { + compatible = "amlogic,meson-sm1-mmc"; +}; + +&sd_emmc_b { + compatible = "amlogic,meson-sm1-mmc"; +}; + +&sd_emmc_c { + compatible = "amlogic,meson-sm1-mmc"; +}; +