From patchwork Wed Oct 28 10:34:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 1389227 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLlNN5h4cz9sVt for ; Wed, 28 Oct 2020 21:36:04 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 36EB582517; Wed, 28 Oct 2020 11:35:08 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 12C62824FE; Wed, 28 Oct 2020 11:34:58 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,KHOP_HELO_FCRDNS, SPF_HELO_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by phobos.denx.de (Postfix) with ESMTP id 01770824F1 for ; Wed, 28 Oct 2020 11:34:53 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=biju.das.jz@bp.renesas.com X-IronPort-AV: E=Sophos;i="5.77,426,1596466800"; d="scan'208";a="60835347" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 28 Oct 2020 19:34:52 +0900 Received: from localhost.localdomain (unknown [172.29.52.252]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 81AFE4000689; Wed, 28 Oct 2020 19:34:50 +0900 (JST) From: Biju Das To: Nobuhiro Iwamatsu , Marek Vasut Cc: Biju Das , Lad Prabhakar , Adam Ford , Simon Glass , Masahiro Yamada , Geert Uytterhoeven , u-boot@lists.denx.de, Chris Paterson Subject: [PATCH RFC 7/8] pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A77965 Date: Wed, 28 Oct 2020 10:34:27 +0000 Message-Id: <20201028103429.3051-8-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201028103429.3051-1-biju.das.jz@bp.renesas.com> References: <20201028103429.3051-1-biju.das.jz@bp.renesas.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Optimize pinctrl image size by disabling pins which are not used by u-boot (ie, not enabled in board dts file). Signed-off-by: Biju Das --- drivers/pinctrl/renesas/pfc-r8a77965.c | 48 +++++++++++++++++++------- 1 file changed, 36 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c index d143750c2d..f8ad66841f 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77965.c +++ b/drivers/pinctrl/renesas/pfc-r8a77965.c @@ -1857,7 +1857,7 @@ static const unsigned int canfd1_data_mux[] = { CANFD1_TX_MARK, CANFD1_RX_MARK, }; -#ifdef CONFIG_PINCTRL_PFC_R8A77965 +#if defined(CONFIG_PINCTRL_PFC_R8A77965) && defined(CONFIG_PINCTRL_PFC_EXTRAS) /* - DRIF0 --------------------------------------------------------------- */ static const unsigned int drif0_ctrl_a_pins[] = { /* CLK, SYNC */ @@ -2131,7 +2131,7 @@ static const unsigned int drif3_data1_b_pins[] = { static const unsigned int drif3_data1_b_mux[] = { RIF3_D1_B_MARK, }; -#endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#endif /* CONFIG_PINCTRL_PFC_R8A77965 && CONFIG_PINCTRL_PFC_EXTRAS */ /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { @@ -2621,6 +2621,7 @@ static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -3318,6 +3319,7 @@ static const unsigned int msiof3_rxd_e_pins[] = { static const unsigned int msiof3_rxd_e_mux[] = { MSIOF3_RXD_E_MARK, }; +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ /* - PWM0 --------------------------------------------------------------------*/ static const unsigned int pwm0_pins[] = { @@ -4391,10 +4393,14 @@ static const unsigned int vin5_clk_mux[] = { }; static const struct { +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) struct sh_pfc_pin_group common[318]; -#ifdef CONFIG_PINCTRL_PFC_R8A77965 +#if defined(CONFIG_PINCTRL_PFC_R8A77965) struct sh_pfc_pin_group automotive[30]; -#endif +#endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#else /* CONFIG_PINCTRL_PFC_EXTRAS */ + struct sh_pfc_pin_group common[219]; +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ } pinmux_groups = { .common = { SH_PFC_PIN_GROUP(audio_clk_a_a), @@ -4484,6 +4490,7 @@ static const struct { SH_PFC_PIN_GROUP(intc_ex_irq3), SH_PFC_PIN_GROUP(intc_ex_irq4), SH_PFC_PIN_GROUP(intc_ex_irq5), +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -4583,6 +4590,7 @@ static const struct { SH_PFC_PIN_GROUP(msiof3_ss2_e), SH_PFC_PIN_GROUP(msiof3_txd_e), SH_PFC_PIN_GROUP(msiof3_rxd_e), +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ SH_PFC_PIN_GROUP(pwm0), SH_PFC_PIN_GROUP(pwm1_a), SH_PFC_PIN_GROUP(pwm1_b), @@ -4716,7 +4724,7 @@ static const struct { SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clk), }, -#ifdef CONFIG_PINCTRL_PFC_R8A77965 +#if defined(CONFIG_PINCTRL_PFC_R8A77965) && defined(CONFIG_PINCTRL_PFC_EXTRAS) .automotive = { SH_PFC_PIN_GROUP(drif0_ctrl_a), SH_PFC_PIN_GROUP(drif0_data0_a), @@ -4749,7 +4757,7 @@ static const struct { SH_PFC_PIN_GROUP(drif3_data0_b), SH_PFC_PIN_GROUP(drif3_data1_b), } -#endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#endif /* CONFIG_PINCTRL_PFC_R8A77965 && CONFIG_PINCTRL_PFC_EXTRAS */ }; static const char * const audio_clk_groups[] = { @@ -4808,7 +4816,7 @@ static const char * const canfd1_groups[] = { "canfd1_data", }; -#ifdef CONFIG_PINCTRL_PFC_R8A77965 +#if defined(CONFIG_PINCTRL_PFC_R8A77965) && defined(CONFIG_PINCTRL_PFC_EXTRAS) static const char * const drif0_groups[] = { "drif0_ctrl_a", "drif0_data0_a", @@ -4850,7 +4858,7 @@ static const char * const drif3_groups[] = { "drif3_data0_b", "drif3_data1_b", }; -#endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#endif /* CONFIG_PINCTRL_PFC_R8A77965 && CONFIG_PINCTRL_PFC_EXTRAS */ static const char * const du_groups[] = { "du_rgb666", @@ -4943,6 +4951,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq5", }; +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -5053,6 +5062,7 @@ static const char * const msiof3_groups[] = { "msiof3_txd_e", "msiof3_rxd_e", }; +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ static const char * const pwm0_groups[] = { "pwm0", @@ -5267,10 +5277,14 @@ static const char * const vin5_groups[] = { }; static const struct { +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) struct sh_pfc_function common[51]; -#ifdef CONFIG_PINCTRL_PFC_R8A77965 +#if defined(CONFIG_PINCTRL_PFC_R8A77965) struct sh_pfc_function automotive[4]; -#endif +#endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#else /* CONFIG_PINCTRL_PFC_EXTRAS */ + struct sh_pfc_function common[47]; +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ } pinmux_functions = { .common = { SH_PFC_FUNCTION(audio_clk), @@ -5293,10 +5307,12 @@ static const struct { SH_PFC_FUNCTION(i2c5), SH_PFC_FUNCTION(i2c6), SH_PFC_FUNCTION(intc_ex), +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), SH_PFC_FUNCTION(msiof3), +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ SH_PFC_FUNCTION(pwm0), SH_PFC_FUNCTION(pwm1), SH_PFC_FUNCTION(pwm2), @@ -5325,14 +5341,14 @@ static const struct { SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), }, -#ifdef CONFIG_PINCTRL_PFC_R8A77965 +#if defined(CONFIG_PINCTRL_PFC_R8A77965) && defined(CONFIG_PINCTRL_PFC_EXTRAS) .automotive = { SH_PFC_FUNCTION(drif0), SH_PFC_FUNCTION(drif1), SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(drif3), } -#endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#endif /* CONFIG_PINCTRL_PFC_R8A77965 && CONFIG_PINCTRL_PFC_EXTRAS */ }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { @@ -6497,11 +6513,19 @@ const struct sh_pfc_soc_info r8a77965_pinmux_info = { .pins = pinmux_pins, .nr_pins = ARRAY_SIZE(pinmux_pins), .groups = pinmux_groups.common, +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) .nr_groups = ARRAY_SIZE(pinmux_groups.common) + ARRAY_SIZE(pinmux_groups.automotive), +#else + .nr_groups = ARRAY_SIZE(pinmux_groups.common), +#endif .functions = pinmux_functions.common, +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) .nr_functions = ARRAY_SIZE(pinmux_functions.common) + ARRAY_SIZE(pinmux_functions.automotive), +#else + .nr_functions = ARRAY_SIZE(pinmux_functions.common), +#endif .cfg_regs = pinmux_config_regs, .drive_regs = pinmux_drive_regs,