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28 Oct 2020 19:34:50 +0900 Received: from localhost.localdomain (unknown [172.29.52.252]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id B469E4004950; Wed, 28 Oct 2020 19:34:47 +0900 (JST) From: Biju Das To: Nobuhiro Iwamatsu , Marek Vasut Cc: Biju Das , Lad Prabhakar , Adam Ford , Simon Glass , Masahiro Yamada , Geert Uytterhoeven , u-boot@lists.denx.de, Chris Paterson Subject: [PATCH RFC 6/8] pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A7796 Date: Wed, 28 Oct 2020 10:34:26 +0000 Message-Id: <20201028103429.3051-7-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201028103429.3051-1-biju.das.jz@bp.renesas.com> References: <20201028103429.3051-1-biju.das.jz@bp.renesas.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Optimize pinctrl image size by disabling pins which are not used by u-boot (ie, not enabled in board dts file) Signed-off-by: Biju Das --- drivers/pinctrl/renesas/Kconfig | 6 ++++ drivers/pinctrl/renesas/pfc-r8a7796.c | 44 +++++++++++++++++++++------ 2 files changed, 40 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig index d2be4c84ba..9a651c6280 100644 --- a/drivers/pinctrl/renesas/Kconfig +++ b/drivers/pinctrl/renesas/Kconfig @@ -7,6 +7,12 @@ config PINCTRL_PFC help Enable support for clock present on Renesas RCar SoCs. +config PINCTRL_PFC_EXTRAS + bool "Renesas pin control options for enabling extras" + depends on PINCTRL_PFC + help + Options for enabling pin control extras. + config PINCTRL_PFC_R8A7790 bool "Renesas RCar Gen2 R8A7790 pin control driver" depends on PINCTRL_PFC diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c index da7901ea6e..6124361859 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7796.c +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c @@ -1841,7 +1841,7 @@ static const unsigned int canfd1_data_mux[] = { CANFD1_TX_MARK, CANFD1_RX_MARK, }; -#if defined(CONFIG_PINCTRL_PFC_R8A7796) +#if defined(CONFIG_PINCTRL_PFC_R8A7796) && defined(CONFIG_PINCTRL_PFC_EXTRAS) /* - DRIF0 --------------------------------------------------------------- */ static const unsigned int drif0_ctrl_a_pins[] = { /* CLK, SYNC */ @@ -2056,7 +2056,7 @@ static const unsigned int drif3_data1_b_pins[] = { static const unsigned int drif3_data1_b_mux[] = { RIF3_D1_B_MARK, }; -#endif /* CONFIG_PINCTRL_PFC_R8A7796 */ +#endif /* CONFIG_PINCTRL_PFC_R8A7796 && CONFIG_PINCTRL_PFC_EXTRAS */ /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { @@ -2469,6 +2469,7 @@ static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -3167,6 +3168,7 @@ static const unsigned int msiof3_rxd_e_pins[] = { static const unsigned int msiof3_rxd_e_mux[] = { MSIOF3_RXD_E_MARK, }; +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ /* - PWM0 --------------------------------------------------------------------*/ static const unsigned int pwm0_pins[] = { @@ -4114,10 +4116,14 @@ static const unsigned int vin5_clk_mux[] = { }; static const struct { +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) struct sh_pfc_pin_group common[312]; #if defined(CONFIG_PINCTRL_PFC_R8A7796) struct sh_pfc_pin_group automotive[30]; -#endif +#endif /* CONFIG_PINCTRL_PFC_R8A7796 */ +#else /* CONFIG_PINCTRL_PFC_EXTRAS */ + struct sh_pfc_pin_group common[213]; +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ } pinmux_groups = { .common = { SH_PFC_PIN_GROUP(audio_clk_a_a), @@ -4207,6 +4213,7 @@ static const struct { SH_PFC_PIN_GROUP(intc_ex_irq3), SH_PFC_PIN_GROUP(intc_ex_irq4), SH_PFC_PIN_GROUP(intc_ex_irq5), +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -4306,6 +4313,7 @@ static const struct { SH_PFC_PIN_GROUP(msiof3_ss2_e), SH_PFC_PIN_GROUP(msiof3_txd_e), SH_PFC_PIN_GROUP(msiof3_rxd_e), +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ SH_PFC_PIN_GROUP(pwm0), SH_PFC_PIN_GROUP(pwm1_a), SH_PFC_PIN_GROUP(pwm1_b), @@ -4433,7 +4441,7 @@ static const struct { SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clk), }, -#if defined(CONFIG_PINCTRL_PFC_R8A7796) +#if defined(CONFIG_PINCTRL_PFC_R8A7796) && defined(CONFIG_PINCTRL_PFC_EXTRAS) .automotive = { SH_PFC_PIN_GROUP(drif0_ctrl_a), SH_PFC_PIN_GROUP(drif0_data0_a), @@ -4466,7 +4474,7 @@ static const struct { SH_PFC_PIN_GROUP(drif3_data0_b), SH_PFC_PIN_GROUP(drif3_data1_b), } -#endif /* CONFIG_PINCTRL_PFC_R8A7796 */ +#endif /* CONFIG_PINCTRL_PFC_R8A7796 && CONFIG_PINCTRL_PFC_EXTRAS */ }; static const char * const audio_clk_groups[] = { @@ -4525,7 +4533,7 @@ static const char * const canfd1_groups[] = { "canfd1_data", }; -#if defined(CONFIG_PINCTRL_PFC_R8A7796) +#if defined(CONFIG_PINCTRL_PFC_R8A7796) && defined(CONFIG_PINCTRL_PFC_EXTRAS) static const char * const drif0_groups[] = { "drif0_ctrl_a", "drif0_data0_a", @@ -4567,7 +4575,7 @@ static const char * const drif3_groups[] = { "drif3_data0_b", "drif3_data1_b", }; -#endif /* CONFIG_PINCTRL_PFC_R8A7796 */ +#endif /* CONFIG_PINCTRL_PFC_R8A7796 && CONFIG_PINCTRL_PFC_EXTRAS */ static const char * const du_groups[] = { "du_rgb666", @@ -4660,6 +4668,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq5", }; +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -4770,6 +4779,7 @@ static const char * const msiof3_groups[] = { "msiof3_txd_e", "msiof3_rxd_e", }; +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ static const char * const pwm0_groups[] = { "pwm0", @@ -4973,10 +4983,14 @@ static const char * const vin5_groups[] = { }; static const struct { +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) struct sh_pfc_function common[49]; #if defined(CONFIG_PINCTRL_PFC_R8A7796) struct sh_pfc_function automotive[4]; -#endif +#endif /* CONFIG_PINCTRL_PFC_R8A7796 */ +#else /* CONFIG_PINCTRL_PFC_EXTRAS */ + struct sh_pfc_function common[45]; +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ } pinmux_functions = { .common = { SH_PFC_FUNCTION(audio_clk), @@ -4999,10 +5013,12 @@ static const struct { SH_PFC_FUNCTION(i2c5), SH_PFC_FUNCTION(i2c6), SH_PFC_FUNCTION(intc_ex), +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), SH_PFC_FUNCTION(msiof3), +#endif /* CONFIG_PINCTRL_PFC_EXTRAS */ SH_PFC_FUNCTION(pwm0), SH_PFC_FUNCTION(pwm1), SH_PFC_FUNCTION(pwm2), @@ -5029,14 +5045,14 @@ static const struct { SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), }, -#if defined(CONFIG_PINCTRL_PFC_R8A7796) +#if defined(CONFIG_PINCTRL_PFC_R8A7796) && defined(CONFIG_PINCTRL_PFC_EXTRAS) .automotive = { SH_PFC_FUNCTION(drif0), SH_PFC_FUNCTION(drif1), SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(drif3), } -#endif /* CONFIG_PINCTRL_PFC_R8A7796 */ +#endif /* CONFIG_PINCTRL_PFC_R8A7796 && CONFIG_PINCTRL_PFC_EXTRAS */ }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { @@ -6201,11 +6217,19 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = { .pins = pinmux_pins, .nr_pins = ARRAY_SIZE(pinmux_pins), .groups = pinmux_groups.common, +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) .nr_groups = ARRAY_SIZE(pinmux_groups.common) + ARRAY_SIZE(pinmux_groups.automotive), +#else + .nr_groups = ARRAY_SIZE(pinmux_groups.common), +#endif .functions = pinmux_functions.common, +#if defined(CONFIG_PINCTRL_PFC_EXTRAS) .nr_functions = ARRAY_SIZE(pinmux_functions.common) + ARRAY_SIZE(pinmux_functions.automotive), +#else + .nr_functions = ARRAY_SIZE(pinmux_functions.common), +#endif .cfg_regs = pinmux_config_regs, .drive_regs = pinmux_drive_regs,