@@ -870,7 +870,8 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* HS400 is not supported on H3 ES1.x and M3W ES1.0, ES1.1 */
if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() <= 1)) ||
- ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A774A1)) &&
(rmobile_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() < 2)))
plat->cfg.host_caps &= ~MMC_MODE_HS400;
@@ -878,7 +879,8 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */
if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() >= 2)) ||
- ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A774A1)) &&
(rmobile_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() == 2)) ||
(rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965))
@@ -894,7 +896,8 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
}
/* M3W ES1.2 can use HS400 with manual adjustment */
- if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A774A1)) &&
(rmobile_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() == 2)) {
priv->adjust_hs400_enable = true;
@@ -904,7 +907,8 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
}
/* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */
- if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A774A1)) &&
(rmobile_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() > 2)) {
priv->adjust_hs400_enable = true;
@@ -933,7 +937,8 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* H3 ES1.x, ES2.0 and M3W ES1.0, ES1.1, ES1.2 uses 4 tuning taps */
if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() <= 2)) ||
- ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A774A1)) &&
(rmobile_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() <= 2)))
priv->nrtaps = 4;
@@ -943,7 +948,8 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */
if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() <= 1)) ||
- ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A774A1)) &&
(rmobile_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() == 0)))
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;