Message ID | 20200928042611.1696178-8-sjg@chromium.org |
---|---|
State | Superseded |
Delegated to: | Bin Meng |
Headers | show
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[73.14.175.90]) by smtp.gmail.com with ESMTPSA id k51sm2620579otc.46.2020.09.27.21.26.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2020 21:26:26 -0700 (PDT) From: Simon Glass <sjg@chromium.org> To: U-Boot Mailing List <u-boot@lists.denx.de> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>, Heinrich Schuchardt <xypron.glpk@gmx.de>, Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>, Wolfgang Wallner <wolfgang.wallner@br-automation.com>, Walter Lozano <walter.lozano@collabora.com>, Simon Glass <sjg@chromium.org>, Bin Meng <bmeng.cn@gmail.com> Subject: [PATCH 09/32] x86: coral: Drop the duplicate PCIe settings Date: Sun, 27 Sep 2020 22:25:48 -0600 Message-Id: <20200928042611.1696178-8-sjg@chromium.org> X-Mailer: git-send-email 2.28.0.681.g6f77f65b4e-goog In-Reply-To: <20200928042611.1696178-1-sjg@chromium.org> References: <20200928042611.1696178-1-sjg@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <https://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean |
Series |
x86: Allow Coral to boot into Chrome OS
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On Mon, Sep 28, 2020 at 12:26 PM Simon Glass <sjg@chromium.org> wrote: > > These settings are included twice. The second lot are correct, so drop the > others. > > Signed-off-by: Simon Glass <sjg@chromium.org> > Reported-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> > --- > > arch/x86/dts/chromebook_coral.dts | 2 -- > 1 file changed, 2 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 893a59b1620..8801b58bb54 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -718,8 +718,6 @@ fsps,ish-enable = <0>; fsps,enable-sata = <0>; - fsps,pcie-root-port-en = [00 00 00 00 00 01]; - fsps,pcie-rp-hot-plug = [00 00 00 00 00 01]; fsps,i2c6-enable = <I2CX_ENABLE_DISABLED>; fsps,i2c7-enable = <I2CX_ENABLE_DISABLED>; fsps,hsuart3-enable = <HSUARTX_ENABLE_DISABLED>;
These settings are included twice. The second lot are correct, so drop the others. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> --- arch/x86/dts/chromebook_coral.dts | 2 -- 1 file changed, 2 deletions(-)