Message ID | 20200927071824.15405-1-Zhiqiang.Hou@nxp.com |
---|---|
State | Changes Requested |
Delegated to: | Priyanka Jain |
Headers | show |
Series | [PATCHv2] pci: layerscape: Fixup PCIe EP mode DT nodes for LX2160A rev2 | expand |
>-----Original Message----- >From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou >Sent: Sunday, September 27, 2020 12:48 PM >To: u-boot@lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Wasim >Khan <wasim.khan@nxp.com> >Cc: Z.q. Hou <zhiqiang.hou@nxp.com> >Subject: [PATCHv2] pci: layerscape: Fixup PCIe EP mode DT nodes for LX2160A >rev2 > >From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > >LX2160A rev2 uses different PCIe controller, so EP mode DT nodes also need to >be fixed up. > >Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> >--- >V2: > - Fix a dead loop issue. > <snip> V0 was already applied . Please send delta in add-on patch. Regards Priyanka
Hi Priyanka, > -----Original Message----- > From: Priyanka Jain (OSS) <priyanka.jain@oss.nxp.com> > Sent: 2020年10月23日 18:49 > To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot@lists.denx.de; Wasim Khan > <wasim.khan@nxp.com> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com> > Subject: RE: [PATCHv2] pci: layerscape: Fixup PCIe EP mode DT nodes for > LX2160A rev2 > > >-----Original Message----- > >From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou > >Sent: Sunday, September 27, 2020 12:48 PM > >To: u-boot@lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Wasim > >Khan <wasim.khan@nxp.com> > >Cc: Z.q. Hou <zhiqiang.hou@nxp.com> > >Subject: [PATCHv2] pci: layerscape: Fixup PCIe EP mode DT nodes for > >LX2160A > >rev2 > > > >From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > > >LX2160A rev2 uses different PCIe controller, so EP mode DT nodes also > >need to be fixed up. > > > >Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > >--- > >V2: > > - Fix a dead loop issue. > > > <snip> > V0 was already applied . Please send delta in add-on patch. > Okay, will send a fix patch. Thanks, Zhiqiang > Regards > Priyanka >
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c index fef0a75f11..b97c67ad84 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.c +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -41,6 +41,8 @@ int lx2_board_fix_fdt(void *fdt) { "config_axi_slave", "config" } }; int off = -1, i; + const fdt32_t *prop; + u32 ob_wins, ib_wins; off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie"); while (off != -FDT_ERR_NOTFOUND) { @@ -86,6 +88,32 @@ int lx2_board_fix_fdt(void *fdt) off = fdt_node_offset_by_compatible(fdt, off, "fsl,lx2160a-pcie"); } + + /* Fixup PCIe EP nodes */ + off = -1; + off = fdt_node_offset_by_compatible(fdt, off, "fsl,lx2160a-pcie-ep"); + while (off != -FDT_ERR_NOTFOUND) { + fdt_setprop_string(fdt, off, "compatible", + "fsl,lx2160ar2-pcie-ep"); + prop = fdt_getprop(fdt, off, "apio-wins", NULL); + if (!prop) { + printf("%s: Failed to fixup PCIe EP node @0x%x\n", + __func__, off); + off = fdt_node_offset_by_compatible(fdt, off, + "fsl,lx2160a-pcie-ep"); + continue; + } + + ob_wins = fdt32_to_cpu(*prop); + ib_wins = (ob_wins == 256) ? 24 : 8; + fdt_setprop_u32(fdt, off, "num-ib-windows", ib_wins); + fdt_setprop_u32(fdt, off, "num-ob-windows", ob_wins); + fdt_delprop(fdt, off, "apio-wins"); + + off = fdt_node_offset_by_compatible(fdt, off, + "fsl,lx2160a-pcie-ep"); + } + return 0; }