| Message ID | 20200815155237.467720-11-seanga2@gmail.com |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | riscv: Add FPIOA and GPIO support for Kendryte K210 | expand |
On 15.08.20 17:52, Sean Anderson wrote: > This patch adds the necessary device tree bindings. > > Signed-off-by: Sean Anderson <seanga2@gmail.com> > Reviewed-by: Simon Glass <sjg@chromium.org> > --- > > (no changes since v2) > > Changes in v2: > - Convert to use pinmux property > - Don't hog ISP on boot > - Re-order GPIOs to match the defaults more closely > > arch/riscv/dts/k210-maix-bit.dts | 104 +++++++++++++++++++++++++++++++ > arch/riscv/dts/k210.dtsi | 12 ++++ > 2 files changed, 116 insertions(+) > > diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts > index 5b32c5fd5f..e840e04ada 100644 > --- a/arch/riscv/dts/k210-maix-bit.dts > +++ b/arch/riscv/dts/k210-maix-bit.dts > @@ -17,6 +17,22 @@ > stdout-path = "serial0:115200"; > }; > > + gpio-leds { > + compatible = "gpio-leds"; > + > + green { > + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; > + }; > + > + red { > + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; > + }; > + > + blue { > + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; > + }; > + }; > + > sound { > compatible = "simple-audio-card"; > simple-audio-card,format = "i2s"; > @@ -39,9 +55,97 @@ > }; > > &uarths0 { > + pinctrl-0 = <&fpioa_uarths>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&gpio0 { > + pinctrl-0 = <&fpioa_gpiohs>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&gpio1 { > + pinctrl-0 = <&fpioa_gpio>; > + pinctrl-names = "default"; > status = "okay"; > }; > > &i2s0 { > #sound-dai-cells = <1>; > + pinctrl-0 = <&fpioa_i2s0>; > + pinctrl-names = "default"; > +}; > + > +&fpioa { > + status = "okay"; > + > + fpioa_uarths: uarths { > + pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>, > + <K210_FPIOA(5, K210_PCF_UARTHS_TX)>; > + }; > + > + fpioa_gpio: gpio { > + pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>, > + <K210_FPIOA(9, K210_PCF_GPIO1)>, > + <K210_FPIOA(10, K210_PCF_GPIO2)>, > + <K210_FPIOA(11, K210_PCF_GPIO3)>, > + <K210_FPIOA(12, K210_PCF_GPIO4)>, > + <K210_FPIOA(13, K210_PCF_GPIO5)>, > + <K210_FPIOA(14, K210_PCF_GPIO6)>, > + <K210_FPIOA(15, K210_PCF_GPIO7)>; On the Maixduino the K210 package pins IO_6 - IO_9, IO_25 - IO_29 serve as interface to the ESP32 which is used for WLAN. In the schema for the Maixduino the naming is: IO_6 - ESP32_TX IO_7 - ESP32_RX IO_8 - ESP32_EN IO_9 - ESP32_READY IO_6 and IO_7 are not mapped in reset state and in a Python example I found for connecting to a WLAN these lines were not used. If the usage of IO_8 and IO_9 differs between the Maixduino and the Maix Bit, shouldn't they be mapped in k210-maix-bit.dts instead of k210.dtsi? According to https://github.com/sipeed/MaixPy/issues/127 one of the SPI interfaces is switched between SD-card and WLAN. The ESP32 connection uses gpiohs while the SD card does not. > + }; > + > + fpioa_gpiohs: gpiohs { > + pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>, IO_16 is connected to the boot button on the Maixduino and Maix Fit boards. So I guess we should add an entry compatible = "gpio-keys" for it and add a comment here. > + <K210_FPIOA(17, K210_PCF_GPIOHS1)>, > + <K210_FPIOA(21, K210_PCF_GPIOHS5)>, > + <K210_FPIOA(22, K210_PCF_GPIOHS6)>, > + <K210_FPIOA(23, K210_PCF_GPIOHS7)>, > + <K210_FPIOA(24, K210_PCF_GPIOHS8)>, > + <K210_FPIOA(25, K210_PCF_GPIOHS9)>, > + <K210_FPIOA(30, K210_PCF_GPIOHS14)>, > + <K210_FPIOA(31, K210_PCF_GPIOHS15)>, > + <K210_FPIOA(32, K210_PCF_GPIOHS16)>, > + <K210_FPIOA(33, K210_PCF_GPIOHS17)>, > + <K210_FPIOA(34, K210_PCF_GPIOHS18)>, > + <K210_FPIOA(35, K210_PCF_GPIOHS19)>; > + }; > + > + fpioa_i2s0: i2s0 { > + pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>, > + <K210_FPIOA(19, K210_PCF_I2S0_WS)>, > + <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>; > + }; > + > + fpioa_dvp: dvp { > + pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>, DVP_SDA in 'Maix-Bit-V2.0(Pin assignment table.xlsx' > + <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>, DVP_SCL > + <K210_FPIOA(42, K210_PCF_DVP_RST)>, DVP_RST > + <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>, DVP_VSYNC > + <K210_FPIOA(44, K210_PCF_DVP_PWDN)>, DVP_PWDN > + <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>, DVP_HSYNC > + <K210_FPIOA(46, K210_PCF_DVP_XCLK)>, DVP_XCLK > + <K210_FPIOA(47, K210_PCF_DVP_PCLK)>; DVP_PCLK > + }; > + > + fpioa_spi0: spi0 { > + pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>, /* cs */ LCD_CS in 'Maix-Bit-V2.0(Pin assignment table.xlsx' > + <K210_FPIOA(37, K210_PCF_GPIOHS21)>, /* rst */ LCD_RST > + <K210_FPIOA(38, K210_PCF_GPIOHS22)>, /* dc */ LCD_DC > + <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */ LCD_WR Should the comments be updated to reflect the connection to LCD? > + }; > + > + fpioa_spi1: spi1 { > + pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>, SPI0 MISO in 'Maix-Bit-V2.0(Pin assignment table.xlsx' > + <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>, SPI0 SCLK > + <K210_FPIOA(28, K210_PCF_SPI1_D0)>, SPI0 MOSI > + <K210_FPIOA(29, K210_PCF_GPIOHS13)>; SPI0_CS0 Should we add comments? Best regards Heinrich > + }; > +}; > + > +&dvp0 { > + pinctrl-0 = <&fpioa_dvp>; > + pinctrl-names = "default"; > }; > diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi > index 2546c7d4e0..fc7986b326 100644 > --- a/arch/riscv/dts/k210.dtsi > +++ b/arch/riscv/dts/k210.dtsi > @@ -5,6 +5,7 @@ > > #include <dt-bindings/clock/k210-sysctl.h> > #include <dt-bindings/mfd/k210-sysctl.h> > +#include <dt-bindings/pinctrl/k210-pinctrl.h> > #include <dt-bindings/reset/k210-sysctl.h> > > / { > @@ -367,7 +368,18 @@ > reg = <0x502B0000 0x100>; > clocks = <&sysclk K210_CLK_FPIOA>; > resets = <&sysrst K210_RST_FPIOA>; > + kendryte,sysctl = <&sysctl>; > + kendryte,power-offset = <K210_SYSCTL_POWER_SEL>; > + pinctrl-0 = <&fpioa_jtag>; > + pinctrl-names = "default"; > status = "disabled"; > + > + fpioa_jtag: jtag { > + pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>, > + <K210_FPIOA(1, K210_PCF_JTAG_TDI)>, > + <K210_FPIOA(2, K210_PCF_JTAG_TMS)>, > + <K210_FPIOA(3, K210_PCF_JTAG_TDO)>; > + }; > }; > > sha256: sha256@502C0000 { >
On 9/2/20 2:04 PM, Heinrich Schuchardt wrote: > On 15.08.20 17:52, Sean Anderson wrote: >> This patch adds the necessary device tree bindings. >> >> Signed-off-by: Sean Anderson <seanga2@gmail.com> >> Reviewed-by: Simon Glass <sjg@chromium.org> >> --- >> >> (no changes since v2) >> >> Changes in v2: >> - Convert to use pinmux property >> - Don't hog ISP on boot >> - Re-order GPIOs to match the defaults more closely >> >> arch/riscv/dts/k210-maix-bit.dts | 104 +++++++++++++++++++++++++++++++ >> arch/riscv/dts/k210.dtsi | 12 ++++ >> 2 files changed, 116 insertions(+) >> >> diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts >> index 5b32c5fd5f..e840e04ada 100644 >> --- a/arch/riscv/dts/k210-maix-bit.dts >> +++ b/arch/riscv/dts/k210-maix-bit.dts >> @@ -17,6 +17,22 @@ >> stdout-path = "serial0:115200"; >> }; >> >> + gpio-leds { >> + compatible = "gpio-leds"; >> + >> + green { >> + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; >> + }; >> + >> + red { >> + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; >> + }; >> + >> + blue { >> + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; >> + }; >> + }; >> + >> sound { >> compatible = "simple-audio-card"; >> simple-audio-card,format = "i2s"; >> @@ -39,9 +55,97 @@ >> }; >> >> &uarths0 { >> + pinctrl-0 = <&fpioa_uarths>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&gpio0 { >> + pinctrl-0 = <&fpioa_gpiohs>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&gpio1 { >> + pinctrl-0 = <&fpioa_gpio>; >> + pinctrl-names = "default"; >> status = "okay"; >> }; >> >> &i2s0 { >> #sound-dai-cells = <1>; >> + pinctrl-0 = <&fpioa_i2s0>; >> + pinctrl-names = "default"; >> +}; >> + >> +&fpioa { >> + status = "okay"; >> + >> + fpioa_uarths: uarths { >> + pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>, >> + <K210_FPIOA(5, K210_PCF_UARTHS_TX)>; >> + }; >> + >> + fpioa_gpio: gpio { >> + pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>, >> + <K210_FPIOA(9, K210_PCF_GPIO1)>, >> + <K210_FPIOA(10, K210_PCF_GPIO2)>, >> + <K210_FPIOA(11, K210_PCF_GPIO3)>, >> + <K210_FPIOA(12, K210_PCF_GPIO4)>, >> + <K210_FPIOA(13, K210_PCF_GPIO5)>, >> + <K210_FPIOA(14, K210_PCF_GPIO6)>, >> + <K210_FPIOA(15, K210_PCF_GPIO7)>; > > On the Maixduino the K210 package pins IO_6 - IO_9, IO_25 - IO_29 serve > as interface to the ESP32 which is used for WLAN. In the schema for the > Maixduino the naming is: > > IO_6 - ESP32_TX > IO_7 - ESP32_RX > IO_8 - ESP32_EN > IO_9 - ESP32_READY > > IO_6 and IO_7 are not mapped in reset state and in a Python example I > found for connecting to a WLAN these lines were not used. > > If the usage of IO_8 and IO_9 differs between the Maixduino and the Maix > Bit, shouldn't they be mapped in k210-maix-bit.dts instead of k210.dtsi? These *are* in k210-maix-bit.dts. > > According to https://github.com/sipeed/MaixPy/issues/127 one of the SPI > interfaces is switched between SD-card and WLAN. The ESP32 connection > uses gpiohs while the SD card does not. > >> + }; >> + >> + fpioa_gpiohs: gpiohs { >> + pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>, > > IO_16 is connected to the boot button on the Maixduino and Maix Fit > boards. So I guess we should add an entry compatible = "gpio-keys" for > it and add a comment here. I saw you created a patch for this [1]. Would you like to keep that separate, or should I add it to this series? [1] https://patchwork.ozlabs.org/project/uboot/patch/20200902201159.98034-1-xypron.glpk@gmx.de/ >> + <K210_FPIOA(17, K210_PCF_GPIOHS1)>, >> + <K210_FPIOA(21, K210_PCF_GPIOHS5)>, >> + <K210_FPIOA(22, K210_PCF_GPIOHS6)>, >> + <K210_FPIOA(23, K210_PCF_GPIOHS7)>, >> + <K210_FPIOA(24, K210_PCF_GPIOHS8)>, >> + <K210_FPIOA(25, K210_PCF_GPIOHS9)>, >> + <K210_FPIOA(30, K210_PCF_GPIOHS14)>, >> + <K210_FPIOA(31, K210_PCF_GPIOHS15)>, >> + <K210_FPIOA(32, K210_PCF_GPIOHS16)>, >> + <K210_FPIOA(33, K210_PCF_GPIOHS17)>, >> + <K210_FPIOA(34, K210_PCF_GPIOHS18)>, >> + <K210_FPIOA(35, K210_PCF_GPIOHS19)>; >> + }; >> + >> + fpioa_i2s0: i2s0 { >> + pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>, >> + <K210_FPIOA(19, K210_PCF_I2S0_WS)>, >> + <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>; >> + }; >> + >> + fpioa_dvp: dvp { >> + pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>, > > DVP_SDA in 'Maix-Bit-V2.0(Pin assignment table.xlsx' > >> + <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>, > > DVP_SCL > >> + <K210_FPIOA(42, K210_PCF_DVP_RST)>, > > DVP_RST > >> + <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>, > > DVP_VSYNC > >> + <K210_FPIOA(44, K210_PCF_DVP_PWDN)>, > > DVP_PWDN > >> + <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>, > > DVP_HSYNC > >> + <K210_FPIOA(46, K210_PCF_DVP_XCLK)>, > > DVP_XCLK > >> + <K210_FPIOA(47, K210_PCF_DVP_PCLK)>; > > DVP_PCLK > >> + }; >> + >> + fpioa_spi0: spi0 { >> + pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>, /* cs */ > > LCD_CS in 'Maix-Bit-V2.0(Pin assignment table.xlsx' > >> + <K210_FPIOA(37, K210_PCF_GPIOHS21)>, /* rst */ > > LCD_RST > >> + <K210_FPIOA(38, K210_PCF_GPIOHS22)>, /* dc */ > > LCD_DC > >> + <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */ > > LCD_WR > > Should the comments be updated to reflect the connection to LCD? Sure. >> + }; >> + >> + fpioa_spi1: spi1 { >> + pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>, > > SPI0 MISO in 'Maix-Bit-V2.0(Pin assignment table.xlsx' > >> + <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>, > > SPI0 SCLK > >> + <K210_FPIOA(28, K210_PCF_SPI1_D0)>, > > SPI0 MOSI > >> + <K210_FPIOA(29, K210_PCF_GPIOHS13)>; > > SPI0_CS0 > > Should we add comments? I will add some for this spi in the next revision. > > Best regards > > Heinrich > >> + }; >> +}; >> + >> +&dvp0 { >> + pinctrl-0 = <&fpioa_dvp>; >> + pinctrl-names = "default"; >> }; >> diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi >> index 2546c7d4e0..fc7986b326 100644 >> --- a/arch/riscv/dts/k210.dtsi >> +++ b/arch/riscv/dts/k210.dtsi >> @@ -5,6 +5,7 @@ >> >> #include <dt-bindings/clock/k210-sysctl.h> >> #include <dt-bindings/mfd/k210-sysctl.h> >> +#include <dt-bindings/pinctrl/k210-pinctrl.h> >> #include <dt-bindings/reset/k210-sysctl.h> >> >> / { >> @@ -367,7 +368,18 @@ >> reg = <0x502B0000 0x100>; >> clocks = <&sysclk K210_CLK_FPIOA>; >> resets = <&sysrst K210_RST_FPIOA>; >> + kendryte,sysctl = <&sysctl>; >> + kendryte,power-offset = <K210_SYSCTL_POWER_SEL>; >> + pinctrl-0 = <&fpioa_jtag>; >> + pinctrl-names = "default"; >> status = "disabled"; >> + >> + fpioa_jtag: jtag { >> + pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>, >> + <K210_FPIOA(1, K210_PCF_JTAG_TDI)>, >> + <K210_FPIOA(2, K210_PCF_JTAG_TMS)>, >> + <K210_FPIOA(3, K210_PCF_JTAG_TDO)>; >> + }; >> }; >> >> sha256: sha256@502C0000 { >> >
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts index 5b32c5fd5f..e840e04ada 100644 --- a/arch/riscv/dts/k210-maix-bit.dts +++ b/arch/riscv/dts/k210-maix-bit.dts @@ -17,6 +17,22 @@ stdout-path = "serial0:115200"; }; + gpio-leds { + compatible = "gpio-leds"; + + green { + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + red { + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + blue { + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; @@ -39,9 +55,97 @@ }; &uarths0 { + pinctrl-0 = <&fpioa_uarths>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&fpioa_gpiohs>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&fpioa_gpio>; + pinctrl-names = "default"; status = "okay"; }; &i2s0 { #sound-dai-cells = <1>; + pinctrl-0 = <&fpioa_i2s0>; + pinctrl-names = "default"; +}; + +&fpioa { + status = "okay"; + + fpioa_uarths: uarths { + pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>, + <K210_FPIOA(5, K210_PCF_UARTHS_TX)>; + }; + + fpioa_gpio: gpio { + pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>, + <K210_FPIOA(9, K210_PCF_GPIO1)>, + <K210_FPIOA(10, K210_PCF_GPIO2)>, + <K210_FPIOA(11, K210_PCF_GPIO3)>, + <K210_FPIOA(12, K210_PCF_GPIO4)>, + <K210_FPIOA(13, K210_PCF_GPIO5)>, + <K210_FPIOA(14, K210_PCF_GPIO6)>, + <K210_FPIOA(15, K210_PCF_GPIO7)>; + }; + + fpioa_gpiohs: gpiohs { + pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>, + <K210_FPIOA(17, K210_PCF_GPIOHS1)>, + <K210_FPIOA(21, K210_PCF_GPIOHS5)>, + <K210_FPIOA(22, K210_PCF_GPIOHS6)>, + <K210_FPIOA(23, K210_PCF_GPIOHS7)>, + <K210_FPIOA(24, K210_PCF_GPIOHS8)>, + <K210_FPIOA(25, K210_PCF_GPIOHS9)>, + <K210_FPIOA(30, K210_PCF_GPIOHS14)>, + <K210_FPIOA(31, K210_PCF_GPIOHS15)>, + <K210_FPIOA(32, K210_PCF_GPIOHS16)>, + <K210_FPIOA(33, K210_PCF_GPIOHS17)>, + <K210_FPIOA(34, K210_PCF_GPIOHS18)>, + <K210_FPIOA(35, K210_PCF_GPIOHS19)>; + }; + + fpioa_i2s0: i2s0 { + pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>, + <K210_FPIOA(19, K210_PCF_I2S0_WS)>, + <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>; + }; + + fpioa_dvp: dvp { + pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>, + <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>, + <K210_FPIOA(42, K210_PCF_DVP_RST)>, + <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>, + <K210_FPIOA(44, K210_PCF_DVP_PWDN)>, + <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>, + <K210_FPIOA(46, K210_PCF_DVP_XCLK)>, + <K210_FPIOA(47, K210_PCF_DVP_PCLK)>; + }; + + fpioa_spi0: spi0 { + pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>, /* cs */ + <K210_FPIOA(37, K210_PCF_GPIOHS21)>, /* rst */ + <K210_FPIOA(38, K210_PCF_GPIOHS22)>, /* dc */ + <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */ + }; + + fpioa_spi1: spi1 { + pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>, + <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>, + <K210_FPIOA(28, K210_PCF_SPI1_D0)>, + <K210_FPIOA(29, K210_PCF_GPIOHS13)>; + }; +}; + +&dvp0 { + pinctrl-0 = <&fpioa_dvp>; + pinctrl-names = "default"; }; diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi index 2546c7d4e0..fc7986b326 100644 --- a/arch/riscv/dts/k210.dtsi +++ b/arch/riscv/dts/k210.dtsi @@ -5,6 +5,7 @@ #include <dt-bindings/clock/k210-sysctl.h> #include <dt-bindings/mfd/k210-sysctl.h> +#include <dt-bindings/pinctrl/k210-pinctrl.h> #include <dt-bindings/reset/k210-sysctl.h> / { @@ -367,7 +368,18 @@ reg = <0x502B0000 0x100>; clocks = <&sysclk K210_CLK_FPIOA>; resets = <&sysrst K210_RST_FPIOA>; + kendryte,sysctl = <&sysctl>; + kendryte,power-offset = <K210_SYSCTL_POWER_SEL>; + pinctrl-0 = <&fpioa_jtag>; + pinctrl-names = "default"; status = "disabled"; + + fpioa_jtag: jtag { + pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>, + <K210_FPIOA(1, K210_PCF_JTAG_TDI)>, + <K210_FPIOA(2, K210_PCF_JTAG_TMS)>, + <K210_FPIOA(3, K210_PCF_JTAG_TDO)>; + }; }; sha256: sha256@502C0000 {