From patchwork Wed Aug 5 13:34:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1341245 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=ul5hi040; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BMCK82zwvz9sPB for ; Wed, 5 Aug 2020 23:34:36 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6396482130; Wed, 5 Aug 2020 15:34:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1596634462; bh=cD2is5GSg76Y935LvicQ8VnY/Oa+YoHlnIahC1RzhQc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=ul5hi040ykoqcYpkaueCtJgBECZDKEpFRKwbtDlRLvVNM7u5aLuaG5Qf7GxF+Y9tc 3dvsLkTen+eGSdOzBnfAUOrco9fJwoXhMgkPtRT/Lo6qmFrSF4sRJauYCVQCJy21fS yFwhcHh94d7roEBh0OgmdbZUfSG02vKV0WRKwrkr6FzIOKFqV0hnhPF3i50HZh20E3 I3HwcNdDw7d9tN+0bh+2bS2H4DMGA0nHkC28zEbfmOK3Md9qnUqvzMLpqVDYfMVoIn gU9BnEAoi5GET6rB23YAXm7FVLPCKa4ic/986cLGK6xwuhY9J9Aq8O8tFky7mhPgMW bGRm73Kp3W2Ag== Received: by phobos.denx.de (Postfix, from userid 109) id 0E2E582130; Wed, 5 Aug 2020 15:34:19 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0B4598158B for ; Wed, 5 Aug 2020 15:34:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=marex@denx.de Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 4BMCJl5sdZz1rsY2; Wed, 5 Aug 2020 15:34:15 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 4BMCJl5d4yz1qyXV; Wed, 5 Aug 2020 15:34:15 +0200 (CEST) Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id YGq57pXvAFic; Wed, 5 Aug 2020 15:34:14 +0200 (CEST) X-Auth-Info: oIC1CzgG69elMBGZXNPVhA3OKxmTLznAP6WzjoFRIFM= Received: from desktop.lan (ip-86-49-101-166.net.upcbroadband.cz [86.49.101.166]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Wed, 5 Aug 2020 15:34:14 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Cc: Marek Vasut , Fabio Estevam , "NXP i . MX U-Boot Team" , Peng Fan , Stefano Babic Subject: [PATCH 2/4] ARM: imx: Add support for switching primary/secondary boot mode to bmode Date: Wed, 5 Aug 2020 15:34:05 +0200 Message-Id: <20200805133407.101338-2-marex@denx.de> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200805133407.101338-1-marex@denx.de> References: <20200805133407.101338-1-marex@denx.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean The i.MX6/i.MX7 is capable of booting a secondary "redundant" system image in case the primary one is corrupted. The user can force this boot mode as well by explicitly setting SRC GPR10 bit 30. This can be potentially useful when upgrading the bootloader itself. Expose this functionality to the user. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: NXP i.MX U-Boot Team Cc: Peng Fan Cc: Stefano Babic Reviewed-by: Stefano Babic --- arch/arm/include/asm/mach-imx/boot_mode.h | 2 ++ arch/arm/include/asm/mach-imx/sys_proto.h | 2 ++ arch/arm/mach-imx/init.c | 22 +++++++++++++++------- arch/arm/mach-imx/mx7/soc.c | 2 ++ 4 files changed, 21 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/mach-imx/boot_mode.h b/arch/arm/include/asm/mach-imx/boot_mode.h index 3a483b6afa..6dc5855968 100644 --- a/arch/arm/include/asm/mach-imx/boot_mode.h +++ b/arch/arm/include/asm/mach-imx/boot_mode.h @@ -7,6 +7,8 @@ #define _ASM_BOOT_MODE_H #define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \ ((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1) +#define MAKE_CFGVAL_PRIMARY_BOOT 0xfffffff0 +#define MAKE_CFGVAL_SECONDARY_BOOT 0xffffffff enum boot_device { WEIM_NOR_BOOT, diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 2d18b1f56b..15d1cba8e7 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -79,6 +79,7 @@ struct bd_info; #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28) +#define IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT BIT(30) #define IMX6_BMODE_MASK GENMASK(7, 0) #define IMX6_BMODE_SHIFT 4 @@ -128,6 +129,7 @@ void gpr_init(void); #ifdef CONFIG_MX7 #define IMX7_SRC_GPR10_BMODE BIT(28) +#define IMX7_SRC_GPR10_PERSIST_SECONDARY_BOOT BIT(30) #endif /* address translation table */ diff --git a/arch/arm/mach-imx/init.c b/arch/arm/mach-imx/init.c index e30d63b896..ce3eb4b0b8 100644 --- a/arch/arm/mach-imx/init.c +++ b/arch/arm/mach-imx/init.c @@ -104,20 +104,28 @@ void init_src(void) void boot_mode_apply(unsigned cfg_val) { #ifdef CONFIG_MX6 + const u32 persist_sec = IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT; const u32 bmode = IMX6_SRC_GPR10_BMODE; #elif CONFIG_MX7 + const u32 persist_sec = IMX7_SRC_GPR10_PERSIST_SECONDARY_BOOT; const u32 bmode = IMX7_SRC_GPR10_BMODE; #endif struct src *psrc = (struct src *)SRC_BASE_ADDR; unsigned reg; - writel(cfg_val, &psrc->gpr9); - reg = readl(&psrc->gpr10); - if (cfg_val) - reg |= bmode; - else - reg &= ~bmode; - writel(reg, &psrc->gpr10); + if (cfg_val == MAKE_CFGVAL_PRIMARY_BOOT) + clrbits_le32(&psrc->gpr10, persist_sec); + else if (cfg_val == MAKE_CFGVAL_SECONDARY_BOOT) + setbits_le32(&psrc->gpr10, persist_sec); + else { + writel(cfg_val, &psrc->gpr9); + reg = readl(&psrc->gpr10); + if (cfg_val) + reg |= bmode; + else + reg &= ~bmode; + writel(reg, &psrc->gpr10); + } } #endif diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 2698ae623e..b6fd25a991 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -415,6 +415,8 @@ void s_init(void) #ifndef CONFIG_SPL_BUILD const struct boot_mode soc_boot_modes[] = { {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)}, + {"primary", MAKE_CFGVAL_PRIMARY_BOOT}, + {"secondary", MAKE_CFGVAL_SECONDARY_BOOT}, {NULL, 0}, }; #endif