Message ID | 20200708013446.2600256-16-sjg@chromium.org |
---|---|
State | Superseded |
Delegated to: | Bin Meng |
Headers | show
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[73.14.175.90]) by smtp.gmail.com with ESMTPSA id d6sm12538047ioo.9.2020.07.07.18.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jul 2020 18:37:44 -0700 (PDT) From: Simon Glass <sjg@chromium.org> To: U-Boot Mailing List <u-boot@lists.denx.de> Cc: Bin Meng <bmeng.cn@gmail.com>, Wolfgang Wallner <wolfgang.wallner@br-automation.com>, Andy Shevchenko <andriy.shevchenko@linux.intel.com>, Simon Glass <sjg@chromium.org> Subject: [PATCH v4 18/25] x86: coral: Update the memory map Date: Tue, 7 Jul 2020 19:34:38 -0600 Message-Id: <20200708013446.2600256-16-sjg@chromium.org> X-Mailer: git-send-email 2.27.0.383.g050319c2ae-goog In-Reply-To: <20200708013446.2600256-1-sjg@chromium.org> References: <20200708013446.2600256-1-sjg@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <https://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean |
Series |
x86: Enhance MTRR functionality to support multiple CPUs
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diff --git a/doc/board/google/chromebook_coral.rst b/doc/board/google/chromebook_coral.rst index 40bd9397d4..c39f1e310c 100644 --- a/doc/board/google/chromebook_coral.rst +++ b/doc/board/google/chromebook_coral.rst @@ -188,6 +188,7 @@ Partial memory map fef00000 1000 CONFIG_BOOTSTAGE_STASH_ADDR fef00000 Base of CAR region + 30000 AP_DEFAULT_BASE (used to start up additional CPUs) f0000 CONFIG_ROM_TABLE_ADDR 120000 BSS (defined in u-boot-spl.lds) 200000 FSP-S (which is run after U-Boot is relocated)