From patchwork Wed May 27 12:56:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1298909 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.a=rsa-sha256 header.s=google header.b=Sq/A7Wep; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49X9x05sBKz9sPF for ; Wed, 27 May 2020 23:03:00 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1F7AB81DCF; Wed, 27 May 2020 14:58:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="Sq/A7Wep"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8D3DF814E1; Wed, 27 May 2020 14:58:03 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 76EC481B69 for ; Wed, 27 May 2020 14:57:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jagan@amarulasolutions.com Received: by mail-pl1-x644.google.com with SMTP id t16so10092941plo.7 for ; Wed, 27 May 2020 05:57:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zQDElQYm5YfddGxuY39IaqtkJbKELWf3iCjHqpjp818=; b=Sq/A7Wepo1Cip4skFzyiXmVSZZz74lZzpmhE+OWa7PHbX4x9Mffm30QFDJ/qfDkWhM 6J8fsUQ4SFkMdHuzLvXBnAZXlVriMoZEYYayCKG1Nid5E7eItumwWRHL1G+kQ6Vc6LwJ eeiCmoTg8Is3HPM1Gr//HlThQeENwOJ2N7Nk0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zQDElQYm5YfddGxuY39IaqtkJbKELWf3iCjHqpjp818=; b=JKZCrPirbAX5oVT+6YBs0BuCsGfCen8iD0+c/4ppxNdklobZioRu5fdNq7+x7oc7hI EWnAY4aN42j8+eJLFlkmcMBJCfVTxbsLcJTuhoivGiUPPlDC4G6ETJ02qMI2kJVWUdrm EwffdDmEZRl27CsPxv7y+lSFzdG/payOny2GwL4AW1I3dAbqvkZ4tB55pk+/qmbu7FJl aUo6u9bTGMoA8fkocAzs8HuEwp//ViYbzeGvMgHZI3A3+RuiAeNNNm/vgCh+m1Jitvu6 MFvb+cSQIziPXXfnpy8/4rDORp25EG9YqyWtp2L97C6ojbbjnJMLy9JPF6Y1Llp8QaHw ZkEA== X-Gm-Message-State: AOAM530YK9w4AepajcS9KR17RR8vSypVbFlGEF6J7JwQriGfXn80PuOe M73dXBpcCFSy+1IC0X0HEpsqBQ== X-Google-Smtp-Source: ABdhPJwanpvthPoY9k5P9Tss/CEIIYfNHhybmG6wP4e49hGMFNyrtpcBY0KI8lwqpWZbx0AKFqmjIA== X-Received: by 2002:a17:90a:6881:: with SMTP id a1mr4971112pjd.153.1590584277043; Wed, 27 May 2020 05:57:57 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:ac3b:7dcd:80:b788]) by smtp.gmail.com with ESMTPSA id k4sm2078274pgg.88.2020.05.27.05.57.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2020 05:57:56 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v2 22/23] spi: omap3: Drop nondm code Date: Wed, 27 May 2020 18:26:36 +0530 Message-Id: <20200527125637.149189-23-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200527125637.149189-1-jagan@amarulasolutions.com> References: <20200527125637.149189-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Now all boards are using this omap3 spi driver in dm model, so drop the nondm code. Signed-off-by: Jagan Teki --- Changes for v2: - none drivers/spi/Kconfig | 14 ++--- drivers/spi/omap3_spi.c | 136 ---------------------------------------- 2 files changed, 7 insertions(+), 143 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 09b9cb17d8..8fccfbf20d 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -226,6 +226,13 @@ config NXP_FSPI Enable the NXP FlexSPI (FSPI) driver. This driver can be used to access the SPI NOR flash on platforms embedding this NXP IP core. +config OMAP3_SPI + bool "McSPI driver for OMAP" + help + SPI master controller for OMAP24XX and later Multichannel SPI + (McSPI). This driver be used to access SPI chips on platforms + embedding this OMAP3 McSPI IP core. + config PIC32_SPI bool "Microchip PIC32 SPI driver" depends on MACH_PIC32 @@ -429,11 +436,4 @@ config MXC_SPI Enable the MXC SPI controller driver. This driver can be used on various i.MX SoCs such as i.MX31/35/51/6/7. -config OMAP3_SPI - bool "McSPI driver for OMAP" - help - SPI master controller for OMAP24XX and later Multichannel SPI - (McSPI). This driver be used to access SPI chips on platforms - embedding this OMAP3 McSPI IP core. - endif # menu "SPI Support" diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 6a615d1498..39e6813469 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -25,16 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX) -#define OMAP3_MCSPI1_BASE 0x48030100 -#define OMAP3_MCSPI2_BASE 0x481A0100 -#else -#define OMAP3_MCSPI1_BASE 0x48098000 -#define OMAP3_MCSPI2_BASE 0x4809A000 -#define OMAP3_MCSPI3_BASE 0x480B8000 -#define OMAP3_MCSPI4_BASE 0x480BA000 -#endif - #define OMAP4_MCSPI_REG_OFFSET 0x100 struct omap2_mcspi_platform_config { @@ -109,9 +99,6 @@ struct mcspi { }; struct omap3_spi_priv { -#ifndef CONFIG_DM_SPI - struct spi_slave slave; -#endif struct mcspi *regs; unsigned int cs; unsigned int freq; @@ -455,128 +442,6 @@ static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv) writel(conf, &priv->regs->modulctrl); } -#ifndef CONFIG_DM_SPI - -static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave) -{ - return container_of(slave, struct omap3_spi_priv, slave); -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - free(priv); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - spi_reset(priv->regs); - - _omap3_spi_claim_bus(priv); - _omap3_spi_set_wordlen(priv); - _omap3_spi_set_mode(priv); - _omap3_spi_set_speed(priv); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - writel(OMAP3_MCSPI_MODULCTRL_MS, &priv->regs->modulctrl); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct omap3_spi_priv *priv; - struct mcspi *regs; - - /* - * OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules) - * with different number of chip selects (CS, channels): - * McSPI1 has 4 CS (bus 0, cs 0 - 3) - * McSPI2 has 2 CS (bus 1, cs 0 - 1) - * McSPI3 has 2 CS (bus 2, cs 0 - 1) - * McSPI4 has 1 CS (bus 3, cs 0) - */ - - switch (bus) { - case 0: - regs = (struct mcspi *)OMAP3_MCSPI1_BASE; - break; -#ifdef OMAP3_MCSPI2_BASE - case 1: - regs = (struct mcspi *)OMAP3_MCSPI2_BASE; - break; -#endif -#ifdef OMAP3_MCSPI3_BASE - case 2: - regs = (struct mcspi *)OMAP3_MCSPI3_BASE; - break; -#endif -#ifdef OMAP3_MCSPI4_BASE - case 3: - regs = (struct mcspi *)OMAP3_MCSPI4_BASE; - break; -#endif - default: - printf("SPI error: unsupported bus %i. Supported busses 0 - 3\n", bus); - return NULL; - } - - if (((bus == 0) && (cs > 3)) || - ((bus == 1) && (cs > 1)) || - ((bus == 2) && (cs > 1)) || - ((bus == 3) && (cs > 0))) { - printf("SPI error: unsupported chip select %i on bus %i\n", cs, bus); - return NULL; - } - - if (max_hz > OMAP3_MCSPI_MAX_FREQ) { - printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 MHz\n", - max_hz); - return NULL; - } - - if (mode > SPI_MODE_3) { - printf("SPI error: unsupported SPI mode %i\n", mode); - return NULL; - } - - priv = spi_alloc_slave(struct omap3_spi_priv, bus, cs); - if (!priv) { - printf("SPI error: malloc of SPI structure failed\n"); - return NULL; - } - - priv->regs = regs; - priv->cs = cs; - priv->freq = max_hz; - priv->mode = mode; - priv->wordlen = priv->slave.wordlen; -#if 0 - /* Please migrate to DM_SPI support for this feature. */ - priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN; -#endif - - return &priv->slave; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - return _spi_xfer(priv, bitlen, dout, din, flags); -} - -#else - static int omap3_spi_claim_bus(struct udevice *dev) { struct udevice *bus = dev->parent; @@ -701,4 +566,3 @@ U_BOOT_DRIVER(omap3_spi) = { .ops = &omap3_spi_ops, .priv_auto_alloc_size = sizeof(struct omap3_spi_priv), }; -#endif