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Mon, 18 May 2020 13:18:15 +0000 (GMT) From: Marek Szyprowski To: u-boot@lists.denx.de Cc: Marek Szyprowski , Matthias Brugger , Tom Rini , Sylwester Nawrocki , marex@denx.de, bmeng.cn@gmail.com, nsaenzjulienne@suse.de, sjg@chromium.org, jh80.chung@samsung.com, b.zolnierkie@samsung.com Subject: [RFC PATCH v3 1/3] arm: provide a function for boards init code to modify MMU virtual-physical map Date: Mon, 18 May 2020 15:17:59 +0200 Message-Id: <20200518131801.465-2-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200518131801.465-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRjm85ztnK2Onqbkm0XGoEgjL1h0SI3CoNO/CsILXlp6UGlT21FL K1iWm03NWok2SyXwkmZmLtMi02lpisu8kKR2Gf1J1IRZpA3Leab9e97n8j7f9/GRmKxc5EUm p6Rz6hSFUi6W4i1vFiy7Id8cG1Bl38g0lTaKmOKCOGZsUStiGronCWZaexkxlbe+iZgWY42Y 6ZrWiZhfphbEFBuaCWbm5TXi4Dq2TPMeZ8uNvTjbZpwk2KmOOoIdmGhF7HVTHWIbTaM429x/ 4RgZJQ1J4JTJmZza/8ApaVL/j1yXtIqt5x/kfMI1yA56JCGB3gNdIzlIj6SkjK5F0HCvGhOG eQSTOr1TsSEYvGlGq5Hf9eUiQahBsJQ3TaxFZqeGCIdLTAeCfkYvdmAPGmCxaHRlFUbXuoBN V7ZicqdV8NY6j+sRSeL0dtB+3OugKToYrJ8LxEKbN9Q/7sAcWEKHgK3zj4tjD9DVBPQVawjB dBieFrxyYneY6jE58Rb421bhDFxB8NXSQAhDAYLhnFLnhYJhwrIodpwCo32g8bm/QB8Cu7Fv hQbaFcZmNjhobBkaWkowgaYgTysT3DvA2PNorbZzcMhpYaH6AyW8TxGC3qFu7AbyNv7vqkSo DnlyGbwqkeODUrhzfrxCxWekJPrFp6qeoOVf07/U87MVtdtPmxFNIvl6ilSZY2UiRSafpTIj IDG5BxVpa4+VUQmKrGxOnRqnzlByvBltJnG5JxV0/3uMjE5UpHNnOC6NU6+qLqTES4PyYzZl vw62Tfi4RShkYR77j++U5Cqz+KZU64nmgYhwwzvJ0kWpa7T2aFEF90JizfcvHEu1VkXG6wJC 63wvebeOJ4jcwwrLwk9quErcUuW97fbQCO1jj37m51ZCPTw7PDsYsks31zR+ZC5qKmlfofKq IXSBWjJZcu7EfTHcjamQ43ySItAXU/OKf3cVKu0xAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsVy+t/xe7ri3YfiDFYcsLbYOGM9q8XUnniL G7/aWC3WHrnLbvGmrZHRYsHkJ6wW22YtZ7M4/Kad1eLblm2MFlMnbWa3eLu3k92B22N2w0UW j3mzTrB47Jx1l93j1YFV7B5n7+xg9OjbsorRY/2Wqywem09XB3BE6dkU5ZeWpCpk5BeX2CpF G1oY6RlaWugZmVjqGRqbx1oZmSrp29mkpOZklqUW6dsl6GWcft/KVDBfrmJl0z2WBsY/El2M nBwSAiYSP1bPY+1i5OIQEljKKHHw4jIWiISMxMlpDawQtrDEn2tdbBBFnxgl+h+eBUuwCRhK dL0FSXByiAhISPzqv8oIUsQssIlJ4tLeBWAJYYFsiWln+9m7GDk4WARUJdpumYKEeQWsJR7d 72GDWCAvsXrDAWYQm1PARuLzwd9MILYQUM2pRxfZJzDyLWBkWMUoklpanJueW2yoV5yYW1ya l66XnJ+7iREY+NuO/dy8g/HSxuBDjAIcjEo8vAn5h+KEWBPLiitzDzFKcDArifBGft4XJ8Sb klhZlVqUH19UmpNafIjRFOimicxSosn5wKjMK4k3NDU0t7A0NDc2NzazUBLn7RA4GCMkkJ5Y kpqdmlqQWgTTx8TBKdXAWPzM162vR8LMPFDqwa1zqrMcmj73bsuc0TfZtLfg04GcA46nz/M6 m8yJUNuV8q7sqIhqRmbGD2G7WQ0fvddK79PL5fgV1Tz9sIYO88/jIYaytznviwrfZHBf9+77 phlJR43tSkr8Pkbc2/bxW8E6/l7tkFcnkwRdPrtyqeyN7T1hPmvSxrTNSizFGYmGWsxFxYkA YamjbZICAAA= X-CMS-MailID: 20200518131816eucas1p1aa84fb661559b858fd976d414212c254 X-Msg-Generator: CA X-RootMTR: 20200518131816eucas1p1aa84fb661559b858fd976d414212c254 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200518131816eucas1p1aa84fb661559b858fd976d414212c254 References: <20200518131801.465-1-m.szyprowski@samsung.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Provide a function for setting arbitrary virtual-physical MMU mapping for the given region. Signed-off-by: Marek Szyprowski --- arch/arm/include/asm/mmu.h | 8 ++++++++ arch/arm/include/asm/system.h | 11 +++++++++++ arch/arm/lib/cache-cp15.c | 24 ++++++++++++++++++------ 3 files changed, 37 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/mmu.h diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h new file mode 100644 index 0000000..fe3d793 --- /dev/null +++ b/arch/arm/include/asm/mmu.h @@ -0,0 +1,8 @@ +#ifndef __ASM_ARM_MMU_H +#define __ASM_ARM_MMU_H + +#ifdef CONFIG_ADDR_MAP +extern void init_addr_map(void); +#endif + +#endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 81ccead..5b9f31c 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -573,6 +573,17 @@ s32 psci_features(u32 function_id, u32 psci_fid); void save_boot_params_ret(void); /** + * Change the virt/phys mapping and cache settings for a region. + * + * \param virt virtual start address of memory region to change + * \param phys physical address for the memory region to set + * \param size size of memory region to change + * \param option dcache option to select + */ +void mmu_set_region_dcache_behaviour_phys(phys_addr_t virt, phys_addr_t phys, + size_t size, enum dcache_option option); + +/** * Change the cache settings for a region. * * \param start start address of memory region to change diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index f8d2096..84ddad3 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -24,7 +24,8 @@ __weak void arm_init_domains(void) { } -void set_section_dcache(int section, enum dcache_option option) +static void set_section_phys(int section, phys_addr_t phys, + enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -36,7 +37,7 @@ void set_section_dcache(int section, enum dcache_option option) #endif /* Add the page offset */ - value |= ((u32)section << MMU_SECTION_SHIFT); + value |= phys; /* Add caching bits */ value |= option; @@ -45,13 +46,18 @@ void set_section_dcache(int section, enum dcache_option option) page_table[section] = value; } +void set_section_dcache(int section, enum dcache_option option) +{ + set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option); +} + __weak void mmu_page_table_flush(unsigned long start, unsigned long stop) { debug("%s: Warning: not implemented\n", __func__); } -void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, - enum dcache_option option) +void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, + size_t size, enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -70,8 +76,8 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size, option); #endif - for (upto = start; upto < end; upto++) - set_section_dcache(upto, option); + for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE) + set_section_phys(upto, phys, option); /* * Make sure range is cache line aligned @@ -86,6 +92,12 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, mmu_page_table_flush(startpt, stoppt); } +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ + mmu_set_region_dcache_behaviour_phys(start, start, size, option); +} + __weak void dram_bank_mmu_setup(int bank) { bd_t *bd = gd->bd;