| Message ID | 20200421171123.6.I845d08dcbe270a6b9339cdca96d25b1f4ce0e13e@changeid |
|---|---|
| State | Changes Requested |
| Delegated to: | Patrice Chotard |
| Headers | show |
| Series | stm32mp1: use OPP information for PLL1 settings in SPL | expand |
Hi Patrick On 4/21/20 5:11 PM, Patrick Delaunay wrote: > Add a weak functions to save the vddcore voltage value provided > in the OPP node when the clock tree is initialized. > > Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> > --- > > arch/arm/mach-stm32mp/include/mach/sys_proto.h | 3 +++ > drivers/clk/clk_stm32mp1.c | 5 +++++ > 2 files changed, 8 insertions(+) > > diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h > index 1617126bea..55193b5c2d 100644 > --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h > +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h > @@ -43,3 +43,6 @@ void get_soc_name(char name[SOC_NAME_SIZE]); > u32 get_bootmode(void); > > int setup_mac_address(void); > + > +/* board power management : configure vddcore according OPP */ > +void board_vddcore_init(u32 voltage_mv); > diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c > index baacc1abb5..5fccc03ba7 100644 > --- a/drivers/clk/clk_stm32mp1.c > +++ b/drivers/clk/clk_stm32mp1.c > @@ -1225,6 +1225,10 @@ bool stm32mp1_supports_opp(u32 opp_id, u32 cpu_type) > } > } > > +__weak void board_vddcore_init(u32 voltage_mv) > +{ > +} > + > /* > * gets OPP parameters (frequency in KHz and voltage in mV) from > * an OPP table subnode. Platform HW support capabilities are also checked. > @@ -1302,6 +1306,7 @@ int stm32mp1_get_max_opp_freq(struct stm32mp1_clk_priv *priv, u64 *freq_hz) > return -FDT_ERR_NOTFOUND; > > *freq_hz = (u64)1000U * freq; > + board_vddcore_init(voltage); > > return 0; > } Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Thanks Patrice
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index 1617126bea..55193b5c2d 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -43,3 +43,6 @@ void get_soc_name(char name[SOC_NAME_SIZE]); u32 get_bootmode(void); int setup_mac_address(void); + +/* board power management : configure vddcore according OPP */ +void board_vddcore_init(u32 voltage_mv); diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index baacc1abb5..5fccc03ba7 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -1225,6 +1225,10 @@ bool stm32mp1_supports_opp(u32 opp_id, u32 cpu_type) } } +__weak void board_vddcore_init(u32 voltage_mv) +{ +} + /* * gets OPP parameters (frequency in KHz and voltage in mV) from * an OPP table subnode. Platform HW support capabilities are also checked. @@ -1302,6 +1306,7 @@ int stm32mp1_get_max_opp_freq(struct stm32mp1_clk_priv *priv, u64 *freq_hz) return -FDT_ERR_NOTFOUND; *freq_hz = (u64)1000U * freq; + board_vddcore_init(voltage); return 0; }
Add a weak functions to save the vddcore voltage value provided in the OPP node when the clock tree is initialized. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> --- arch/arm/mach-stm32mp/include/mach/sys_proto.h | 3 +++ drivers/clk/clk_stm32mp1.c | 5 +++++ 2 files changed, 8 insertions(+)