| Message ID | 20200411192619.24133-1-paweldembicki@gmail.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | net: mvgbe: add support for differ PHY addresses | expand |
Hi Pawel, Sorry for the delay replying. On Sun, 12 Apr 2020, 7:27 AM Pawel Dembicki, <paweldembicki@gmail.com> wrote: > PHYs on some boards have not subsequential addresses. > This patch introduces define PHY_BASE_ADR2, which allow > to configure separate PHY addresses for both interfaces. > These days this kind of information should really be coming via the devicetree. Infact as far as I can tell the current code should support specifying the phy address this way. > Cc: Joe Hershberger <joe.hershberger@ni.com> > Cc: Chris Packham <judge.packham@gmail.com> > Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> > --- > drivers/net/mvgbe.c | 23 ++++++++++++++++++++--- > drivers/net/mvgbe.h | 4 ++++ > 2 files changed, 24 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c > index 037e59ec6e..d40fb5af81 100644 > --- a/drivers/net/mvgbe.c > +++ b/drivers/net/mvgbe.c > @@ -874,7 +874,15 @@ int mvgbe_initialize(bd_t *bis) > eth_register(dev); > > #if defined(CONFIG_PHYLIB) > - mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum); > + > + if (devnum == 0) > + mvgbe_phylib_init(dev, PHY_BASE_ADR); > + else > +#if defined(PHY_BASE_ADR2) > + mvgbe_phylib_init(dev, PHY_BASE_ADR2); > +#else > + mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum); > +#endif > #elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII) > int retval; > struct mii_dev *mdiodev = mdio_alloc(); > @@ -888,8 +896,17 @@ int mvgbe_initialize(bd_t *bis) > if (retval < 0) > return retval; > /* Set phy address of the port */ > - miiphy_write(dev->name, MV_PHY_ADR_REQUEST, > - MV_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum); > + if (devnum == 0) > + miiphy_write(dev->name, MV_PHY_ADR_REQUEST, > + MV_PHY_ADR_REQUEST, PHY_BASE_ADR); > + else > +#if defined(PHY_BASE_ADR2) > + miiphy_write(dev->name, MV_PHY_ADR_REQUEST, > + MV_PHY_ADR_REQUEST, PHY_BASE_ADR2); > +#else > + miiphy_write(dev->name, MV_PHY_ADR_REQUEST, > + MV_PHY_ADR_REQUEST, PHY_BASE_ADR + > devnum); > +#endif > #endif > } > return 0; > diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h > index 44541c0a85..f37d4c3d59 100644 > --- a/drivers/net/mvgbe.h > +++ b/drivers/net/mvgbe.h > @@ -18,6 +18,10 @@ > #define PHY_BASE_ADR 0x08 /* default phy base addr */ > #endif > > +#if defined(CONFIG_PHY_BASE_ADR2) > +#define PHY_BASE_ADR2 CONFIG_PHY_BASE_ADR2 > +#endif > + > /* Constants */ > #define INT_CAUSE_UNMASK_ALL 0x0007ffff > #define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff > -- > 2.20.1 > >
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 037e59ec6e..d40fb5af81 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -874,7 +874,15 @@ int mvgbe_initialize(bd_t *bis) eth_register(dev); #if defined(CONFIG_PHYLIB) - mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum); + + if (devnum == 0) + mvgbe_phylib_init(dev, PHY_BASE_ADR); + else +#if defined(PHY_BASE_ADR2) + mvgbe_phylib_init(dev, PHY_BASE_ADR2); +#else + mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum); +#endif #elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII) int retval; struct mii_dev *mdiodev = mdio_alloc(); @@ -888,8 +896,17 @@ int mvgbe_initialize(bd_t *bis) if (retval < 0) return retval; /* Set phy address of the port */ - miiphy_write(dev->name, MV_PHY_ADR_REQUEST, - MV_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum); + if (devnum == 0) + miiphy_write(dev->name, MV_PHY_ADR_REQUEST, + MV_PHY_ADR_REQUEST, PHY_BASE_ADR); + else +#if defined(PHY_BASE_ADR2) + miiphy_write(dev->name, MV_PHY_ADR_REQUEST, + MV_PHY_ADR_REQUEST, PHY_BASE_ADR2); +#else + miiphy_write(dev->name, MV_PHY_ADR_REQUEST, + MV_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum); +#endif #endif } return 0; diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h index 44541c0a85..f37d4c3d59 100644 --- a/drivers/net/mvgbe.h +++ b/drivers/net/mvgbe.h @@ -18,6 +18,10 @@ #define PHY_BASE_ADR 0x08 /* default phy base addr */ #endif +#if defined(CONFIG_PHY_BASE_ADR2) +#define PHY_BASE_ADR2 CONFIG_PHY_BASE_ADR2 +#endif + /* Constants */ #define INT_CAUSE_UNMASK_ALL 0x0007ffff #define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff
PHYs on some boards have not subsequential addresses. This patch introduces define PHY_BASE_ADR2, which allow to configure separate PHY addresses for both interfaces. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chris Packham <judge.packham@gmail.com> Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> --- drivers/net/mvgbe.c | 23 ++++++++++++++++++++--- drivers/net/mvgbe.h | 4 ++++ 2 files changed, 24 insertions(+), 3 deletions(-)