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[73.14.175.90]) by smtp.gmail.com with ESMTPSA id k18sm7356451ios.18.2020.04.08.15.57.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Apr 2020 15:57:57 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Leif Lindholm , Andy Shevchenko , Bin Meng , Wolfgang Wallner , Simon Glass Subject: [PATCH v5 01/29] cpu: Support querying the address width Date: Wed, 8 Apr 2020 16:57:20 -0600 Message-Id: <20200408165737.v5.1.I094ecfe5a8a83eabccd2ac9f6dc5f6fccbdcea5f@changeid> X-Mailer: git-send-email 2.26.0.292.g33ef6b2f38-goog In-Reply-To: <20200408225749.171380-1-sjg@chromium.org> References: <20200408225749.171380-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Different CPUs may support different address widths, meaning the amount of memory they can address. Add a property for this to the cpu_info struct. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/cpu/cpu_sandbox.c | 1 + include/cpu.h | 2 ++ test/dm/cpu.c | 1 + 3 files changed, 4 insertions(+) diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c index ff87e8adca3..05b384f6a45 100644 --- a/drivers/cpu/cpu_sandbox.c +++ b/drivers/cpu/cpu_sandbox.c @@ -19,6 +19,7 @@ int cpu_sandbox_get_info(struct udevice *dev, struct cpu_info *info) { info->cpu_freq = 42 * 42 * 42 * 42 * 42; info->features = 0x42424242; + info->address_width = IS_ENABLED(CONFIG_PHYS_64BIT) ? 64 : 32; return 0; } diff --git a/include/cpu.h b/include/cpu.h index 28dd48feb8f..6b1b6b37b3b 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -44,10 +44,12 @@ enum { * * @cpu_freq: Current CPU frequency in Hz * @features: Flags for supported CPU features + * @address_width: Width of the CPU address space in bits (e.g. 32) */ struct cpu_info { ulong cpu_freq; ulong features; + uint address_width; }; struct cpu_ops { diff --git a/test/dm/cpu.c b/test/dm/cpu.c index f5f1caef716..e6dc576ea3c 100644 --- a/test/dm/cpu.c +++ b/test/dm/cpu.c @@ -33,6 +33,7 @@ static int dm_test_cpu(struct unit_test_state *uts) ut_assertok(cpu_get_info(dev, &info)); ut_asserteq(info.cpu_freq, 42 * 42 * 42 * 42 * 42); ut_asserteq(info.features, 0x42424242); + ut_asserteq(info.address_width, 32); ut_asserteq(cpu_get_count(dev), 42);