| Message ID | 20200326210102.418585-1-marex@denx.de |
|---|---|
| State | Superseded |
| Delegated to: | Patrick Delaunay |
| Headers | show |
| Series | ARM: dts: stm32: Add QSPI NOR on AV96 | expand |
Hi Marek On 3/26/20 10:01 PM, Marek Vasut wrote: > The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it > into the DT. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Patrick Delaunay <patrick.delaunay@st.com> > Cc: Patrice Chotard <patrice.chotard@st.com> > --- > arch/arm/dts/stm32mp157a-avenger96.dts | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts b/arch/arm/dts/stm32mp157a-avenger96.dts > index e7505c7596..c8846e4180 100644 > --- a/arch/arm/dts/stm32mp157a-avenger96.dts > +++ b/arch/arm/dts/stm32mp157a-avenger96.dts > @@ -20,6 +20,7 @@ > mmc0 = &sdmmc1; > serial0 = &uart4; > serial1 = &uart7; > + spi0 = &qspi; > }; > > chosen { > @@ -286,6 +287,25 @@ > vdd_3v3_usbfs-supply = <&vdd_usb>; > }; > > +&qspi { > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; > + pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; > + reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "okay"; > + > + flash0: mx66l51235l@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-rx-bus-width = <4>; > + spi-max-frequency = <108000000>; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > +}; > + > &rng1 { > status = "okay"; > }; Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Thanks
diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts b/arch/arm/dts/stm32mp157a-avenger96.dts index e7505c7596..c8846e4180 100644 --- a/arch/arm/dts/stm32mp157a-avenger96.dts +++ b/arch/arm/dts/stm32mp157a-avenger96.dts @@ -20,6 +20,7 @@ mmc0 = &sdmmc1; serial0 = &uart4; serial1 = &uart7; + spi0 = &qspi; }; chosen { @@ -286,6 +287,25 @@ vdd_3v3_usbfs-supply = <&vdd_usb>; }; +&qspi { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; + pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; + reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash0: mx66l51235l@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + &rng1 { status = "okay"; };
The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it into the DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> --- arch/arm/dts/stm32mp157a-avenger96.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)