diff mbox series

[U-Boot,3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop

Message ID 20191126083452.4605-3-marex@denx.de
State Accepted
Commit b314003fda6e398c5acdd691e4f39d50c1810bce
Delegated to: Stefano Babic
Headers show
Series None | expand

Commit Message

Marek Vasut Nov. 26, 2019, 8:34 a.m. UTC
Instead of explicitly setting up each SDQS register, use a loop.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/mach-imx/mx6/ddr.c | 27 ++++++++-------------------
 1 file changed, 8 insertions(+), 19 deletions(-)

Comments

Eric Nelson Nov. 26, 2019, 4:26 p.m. UTC | #1
Hi Marek,

On 11/26/19 1:34 AM, Marek Vasut wrote:
> Instead of explicitly setting up each SDQS register, use a loop.
> No functional change.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>   arch/arm/mach-imx/mx6/ddr.c | 27 ++++++++-------------------
>   1 file changed, 8 insertions(+), 19 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
> index e917b04f3d..b2402f75db 100644
> --- a/arch/arm/mach-imx/mx6/ddr.c
> +++ b/arch/arm/mach-imx/mx6/ddr.c
> @@ -249,25 +249,14 @@ static void mmdc_set_sdqs(bool set)
>   {
>   	struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
>   		(struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
> -
> -	if (set) {
> -		setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
> -		setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
> -		setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
> -		setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
> -		setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
> -		setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
> -		setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
> -		setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
> -	} else {
> -		clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
> -		clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
> -		clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
> -		clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
> -		clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
> -		clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
> -		clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
> -		clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
> +	u32 sdqs = (u32)(&mx6_ddr_iomux->dram_sdqs0);
> +	int i;
> +
> +	for (i = 0; i < 8; i++) {
> +		if (set)
> +			setbits_le32(sdqs + (4 * i), 0x7000);
> +		else
> +			clrbits_le32(sdqs + (4 * i), 0x7000);
>   	}
>   }
>   
> 

Reviewed-by: Eric Nelson <eric@nelint.com>
Stefano Babic Dec. 29, 2019, 10:26 a.m. UTC | #2
> Instead of explicitly setting up each SDQS register, use a loop.
> No functional change.
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Reviewed-by: Eric Nelson <eric@nelint.com>
Applied to u-boot-imx, -next, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index e917b04f3d..b2402f75db 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -249,25 +249,14 @@  static void mmdc_set_sdqs(bool set)
 {
 	struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
 		(struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
-
-	if (set) {
-		setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
-		setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
-		setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
-		setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
-		setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
-		setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
-		setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
-		setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
-	} else {
-		clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
-		clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
-		clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
-		clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
-		clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
-		clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
-		clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
-		clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
+	u32 sdqs = (u32)(&mx6_ddr_iomux->dram_sdqs0);
+	int i;
+
+	for (i = 0; i < 8; i++) {
+		if (set)
+			setbits_le32(sdqs + (4 * i), 0x7000);
+		else
+			clrbits_le32(sdqs + (4 * i), 0x7000);
 	}
 }