From patchwork Fri Nov 22 22:23:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Olovyannikov X-Patchwork-Id: 1199679 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=broadcom.com header.i=@broadcom.com header.b="R6umjOV5"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 47KWF30HG7z9sPL for ; Sat, 23 Nov 2019 09:24:23 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id A6078C21C2C; Fri, 22 Nov 2019 22:24:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 88DB2C21D8A; Fri, 22 Nov 2019 22:24:05 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0001FC21D74; Fri, 22 Nov 2019 22:23:49 +0000 (UTC) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by lists.denx.de (Postfix) with ESMTPS id B5465C21CB1 for ; Fri, 22 Nov 2019 22:23:49 +0000 (UTC) Received: by mail-wr1-f66.google.com with SMTP id b18so10430235wrj.8 for ; Fri, 22 Nov 2019 14:23:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=O2L+zrq+QSdcKaapJYLGcne+ubAIZ6b8jbzsRWEOd5s=; b=R6umjOV526QGP7zrj1Yg+3Fk1zGVFxxvopYZO304QtTxNPGvWIiIfb2LttqhepNBVL fNygiJ73gjXl/VRDNx8I8jP5/SVtAukkcj+EYfMOlZS4NA2+4NBLpi4IKXKCu9kblXb7 RoLWHOE7fvFfW+Uoap2+kG42CR/epQ0OOwbD8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=O2L+zrq+QSdcKaapJYLGcne+ubAIZ6b8jbzsRWEOd5s=; b=p5HxSz8IviOyfx6bi5saFF5r++n+WBWWTkVoal0P/aZzWG2XBt/IAP+49fl3IYhMnv yUUnB/WBy7GF2jb/N205adO2gZq5xMUJ69tRBu8lkPMDn4kds/mKXI3NBuMRJ5mQPfmU 6dFiO4r6O3K0ayHvNrPOD3qwcUyvhPjz3k7n/ZyO6OBHShzcQQmgs6LHhUXSGPtm/gRG P3l3dw8v3qCegkEKD1IrR2nTbOFxH8rgiYujN95cGtwPGAZ1eJRSlhH3vbo9sr3s6rlW obw+Cy33rAMDl3GC6cx8bdmZyE1Q6YQJdHzpdAmyi/6o6Pb8KVRBFEa+S/R3iskX8tRK gNkA== X-Gm-Message-State: APjAAAXBzCOqAfCPD8rV7Ty+RxeQUPWdAEbcO7A4U7wUx9KNWBfN9Pny ZhNIx2qEE18EXkKfQuF1BR+W0vefO/ZF5jZ2GoRgyMmUKhXFnP2kKNS4yb3dRvxqPPmhq8BGK0+ h4s+3x7gUa15ui+whpjJ2VWqqyDm028l6FjUKdSVQtGwjG8ZAzo3+ZYJ1BfS0woWp1nK4Te9qcW SmeX1F97VCOuU= X-Google-Smtp-Source: APXvYqziuCkLL1BQFF/UpwR+NW7xQEVKnsgcTUmJlPX3tEugHPeKTz96hrat014xydAiIZr10QIADg== X-Received: by 2002:a5d:4a8c:: with SMTP id o12mr3305956wrq.43.1574461428838; Fri, 22 Nov 2019 14:23:48 -0800 (PST) Received: from LBRMN-LNXUB114.ric.broadcom.com ([192.19.228.250]) by smtp.gmail.com with ESMTPSA id d20sm9623176wra.4.2019.11.22.14.23.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2019 14:23:48 -0800 (PST) From: Vladimir Olovyannikov To: u-boot@lists.denx.de Date: Fri, 22 Nov 2019 14:23:23 -0800 Message-Id: <20191122222323.28898-4-vladimir.olovyannikov@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191122222323.28898-1-vladimir.olovyannikov@broadcom.com> References: <20191122222323.28898-1-vladimir.olovyannikov@broadcom.com> Cc: Srinath Mannam Subject: [U-Boot] [PATCH 3/3] drivers: pci: pci-uclass: Get PCI dma regions support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Srinath Mannam Add API to parse dma-regions given in PCIe host controller DT node. Signed-off-by: Srinath Mannam Signed-off-by: Vladimir Olovyannikov --- drivers/pci/pci-uclass.c | 41 ++++++++++++++++++++++++++++++++++++++++ include/pci.h | 2 ++ 2 files changed, 43 insertions(+) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index eb7a01fd55..ddc2d5cf2c 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -1166,6 +1166,47 @@ ulong pci_conv_size_to_32(ulong old, ulong value, uint offset, return value; } +int pci_get_dma_regions(struct udevice *dev, struct pci_region *memp, int index) +{ + int pci_addr_cells, addr_cells, size_cells; + int cells_per_record; + const u32 *prop; + int len; + int i = 0; + + prop = ofnode_get_property(dev_ofnode(dev), "dma-ranges", &len); + if (!prop) { + dev_err(dev, "%s: Cannot decode dma-ranges\n", __func__); + return -EINVAL; + } + + pci_addr_cells = ofnode_read_simple_addr_cells(dev_ofnode(dev)); + addr_cells = ofnode_read_simple_addr_cells(dev_ofnode(dev->parent)); + size_cells = ofnode_read_simple_size_cells(dev_ofnode(dev)); + + /* PCI addresses are always 3-cells */ + len /= sizeof(u32); + cells_per_record = pci_addr_cells + addr_cells + size_cells; + debug("%s: len=%d, cells_per_record=%d\n", __func__, len, + cells_per_record); + + while (len) { + memp->bus_start = fdtdec_get_number(prop + 1, 2); + prop += pci_addr_cells; + memp->phys_start = fdtdec_get_number(prop, addr_cells); + prop += addr_cells; + memp->size = fdtdec_get_number(prop, size_cells); + prop += size_cells; + + if (i == index) + return 0; + i++; + len -= cells_per_record; + } + + return -EINVAL; +} + int pci_get_regions(struct udevice *dev, struct pci_region **iop, struct pci_region **memp, struct pci_region **prefp) { diff --git a/include/pci.h b/include/pci.h index ff59ac0e69..ef55f54ea5 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1284,6 +1284,8 @@ struct udevice *pci_get_controller(struct udevice *dev); int pci_get_regions(struct udevice *dev, struct pci_region **iop, struct pci_region **memp, struct pci_region **prefp); +int +pci_get_dma_regions(struct udevice *dev, struct pci_region *memp, int index); /** * dm_pci_write_bar32() - Write the address of a BAR *