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Thu, 14 Nov 2019 19:05:33 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id r68sm8822951pfr.78.2019.11.14.19.05.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2019 19:05:32 -0800 (PST) From: Kever Yang To: u-boot@lists.denx.de Date: Fri, 15 Nov 2019 11:04:34 +0800 Message-Id: <20191115030507.5781-4-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191115030507.5781-1-kever.yang@rock-chips.com> References: <20191115030507.5781-1-kever.yang@rock-chips.com> Cc: YouMin Chen Subject: [U-Boot] [PATCH v3 03/22] rockchip: sdram: move cap structure and debug function to sdram_common.h X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The sdram.h suppose to be helper file for sdram.c which including dram size decode and some u-boot related dram init interface, and all structure and function for dram driver move to sdram_common.h Signed-off-by: YouMin Chen Signed-off-by: Kever Yang --- Changes in v3: None Changes in v2: None arch/arm/include/asm/arch-rockchip/sdram.h | 48 --------------- .../include/asm/arch-rockchip/sdram_common.h | 59 +++++++++++++++++++ .../include/asm/arch-rockchip/sdram_rk3328.h | 1 + .../include/asm/arch-rockchip/sdram_rk3399.h | 1 + 4 files changed, 61 insertions(+), 48 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_common.h diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h b/arch/arm/include/asm/arch-rockchip/sdram.h index f3933f3598..01fc353d81 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram.h +++ b/arch/arm/include/asm/arch-rockchip/sdram.h @@ -15,34 +15,6 @@ enum { UNUSED = 0xFF }; -struct sdram_cap_info { - unsigned int rank; - /* dram column number, 0 means this channel is invalid */ - unsigned int col; - /* dram bank number, 3:8bank, 2:4bank */ - unsigned int bk; - /* channel buswidth, 2:32bit, 1:16bit, 0:8bit */ - unsigned int bw; - /* die buswidth, 2:32bit, 1:16bit, 0:8bit */ - unsigned int dbw; - /* - * row_3_4 = 1: 6Gb or 12Gb die - * row_3_4 = 0: normal die, power of 2 - */ - unsigned int row_3_4; - unsigned int cs0_row; - unsigned int cs1_row; - unsigned int ddrconfig; -}; - -struct sdram_base_params { - unsigned int ddr_freq; - unsigned int dramtype; - unsigned int num_channels; - unsigned int stride; - unsigned int odt; -}; - /* * sys_reg bitfield struct * [31] row_3_4_ch1 @@ -124,24 +96,4 @@ size_t rockchip_sdram_size(phys_addr_t reg); /* Called by U-Boot board_init_r for Rockchip SoCs */ int dram_init(void); -#if !defined(CONFIG_RAM_ROCKCHIP_DEBUG) -inline void sdram_print_dram_type(unsigned char dramtype) -{ -} - -inline void sdram_print_ddr_info(struct sdram_cap_info *cap_info, - struct sdram_base_params *base) -{ -} - -inline void sdram_print_stride(unsigned int stride) -{ -} -#else -void sdram_print_dram_type(unsigned char dramtype); -void sdram_print_ddr_info(struct sdram_cap_info *cap_info, - struct sdram_base_params *base); -void sdram_print_stride(unsigned int stride); -#endif /* CONFIG_RAM_ROCKCHIP_DEBUG */ - #endif diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h new file mode 100644 index 0000000000..8d771ce16f --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Rockchip Electronics Co., Ltd + */ + +#ifndef _ASM_ARCH_SDRAM_COMMON_H +#define _ASM_ARCH_SDRAM_COMMON_H + +struct sdram_cap_info { + unsigned int rank; + /* dram column number, 0 means this channel is invalid */ + unsigned int col; + /* dram bank number, 3:8bank, 2:4bank */ + unsigned int bk; + /* channel buswidth, 2:32bit, 1:16bit, 0:8bit */ + unsigned int bw; + /* die buswidth, 2:32bit, 1:16bit, 0:8bit */ + unsigned int dbw; + /* + * row_3_4 = 1: 6Gb or 12Gb die + * row_3_4 = 0: normal die, power of 2 + */ + unsigned int row_3_4; + unsigned int cs0_row; + unsigned int cs1_row; + unsigned int cs0_high16bit_row; + unsigned int cs1_high16bit_row; + unsigned int ddrconfig; +}; + +struct sdram_base_params { + unsigned int ddr_freq; + unsigned int dramtype; + unsigned int num_channels; + unsigned int stride; + unsigned int odt; +}; + +#if !defined(CONFIG_RAM_ROCKCHIP_DEBUG) +inline void sdram_print_dram_type(unsigned char dramtype) +{ +} + +inline void sdram_print_ddr_info(struct sdram_cap_info *cap_info, + struct sdram_base_params *base) +{ +} + +inline void sdram_print_stride(unsigned int stride) +{ +} +#else +void sdram_print_dram_type(unsigned char dramtype); +void sdram_print_ddr_info(struct sdram_cap_info *cap_info, + struct sdram_base_params *base); +void sdram_print_stride(unsigned int stride); +#endif /* CONFIG_RAM_ROCKCHIP_DEBUG */ + +#endif diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h index 11411ead10..c747b461a1 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h @@ -6,6 +6,7 @@ #ifndef _ASM_ARCH_SDRAM_RK3328_H #define _ASM_ARCH_SDRAM_RK3328_H +#include #define SR_IDLE 93 #define PD_IDLE 13 diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h index dc65ae7924..485bb3d889 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h @@ -5,6 +5,7 @@ #ifndef _ASM_ARCH_SDRAM_RK3399_H #define _ASM_ARCH_SDRAM_RK3399_H +#include struct rk3399_ddr_pctl_regs { u32 denali_ctl[332];