From patchwork Thu Nov 14 10:36:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biwen Li X-Patchwork-Id: 1194711 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 47DHzs04sQz9sP6 for ; Thu, 14 Nov 2019 21:39:52 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 7CD2EC21E07; Thu, 14 Nov 2019 10:38:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8524CC21DF3; Thu, 14 Nov 2019 10:37:23 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C2854C21E02; Thu, 14 Nov 2019 10:37:18 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 1DC31C21DA6 for ; Thu, 14 Nov 2019 10:37:15 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id DAF1B1A01D6; Thu, 14 Nov 2019 11:37:14 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 748681A028D; Thu, 14 Nov 2019 11:37:07 +0100 (CET) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 50B5B40305; Thu, 14 Nov 2019 18:36:58 +0800 (SGT) From: Biwen Li To: jagdish.gediya@nxp.com, priyanka.jain@nxp.com, hs@denx.de, jagan@amarulasolutions.com, aford173@gmail.com, alison.wang@nxp.com, bhaskar.upadhaya@nxp.com, feng.li_2@nxp.com, jh80.chung@samsung.com, pramod.kumar_1@nxp.com, rajesh.bhagat@nxp.com, ruchika.gupta@nxp.com, olteanv@gmail.com Date: Thu, 14 Nov 2019 18:36:02 +0800 Message-Id: <20191114103641.34085-3-biwen.li@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191114103641.34085-1-biwen.li@nxp.com> References: <20191114103641.34085-1-biwen.li@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Cc: u-boot@lists.denx.de, jiafei.pan@nxp.com, xiaobo.xie@nxp.com Subject: [U-Boot] [PATCH 03/42] board: freescale: ls1012ardb: ls1012ardb.c: support dm_i2c_* API X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This supports dm_i2c_* API for board LS1012ARDB Signed-off-by: Biwen Li --- board/freescale/ls1012ardb/ls1012ardb.c | 147 ++++++++++++++++++++---- 1 file changed, 123 insertions(+), 24 deletions(-) diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index e4527c19b8..271227a976 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -32,13 +32,27 @@ int checkboard(void) { #ifdef CONFIG_TARGET_LS1012ARDB u8 in1; + int ret, bus_num = 0; puts("Board: LS1012ARDB "); /* Initialize i2c early for Serial flash bank information */ - i2c_set_bus_num(0); +#if defined(CONFIG_DM_I2C) + struct udevice *dev; - if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1) < 0) { + ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return -ENXIO; + } + ret = dm_i2c_read(dev, I2C_MUX_IO_1, &in1, 1); +#else /* Non DM I2C support - will be removed */ + i2c_set_bus_num(bus_num); + ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1); +#endif + if (ret < 0) { printf("Error reading i2c boot information!\n"); return 0; /* Don't want to hang() on this error */ } @@ -173,11 +187,25 @@ int esdhc_status_fixup(void *blob, const char *compat) bool sdhc2_en = false; u8 mux_sdhc2; u8 io = 0; + int ret, bus_num = 0; - i2c_set_bus_num(0); +#if defined(CONFIG_DM_I2C) + struct udevice *dev; + ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return -ENXIO; + } + ret = dm_i2c_read(dev, I2C_MUX_IO_1, &io, 1); +#else + i2c_set_bus_num(bus_num); /* IO1[7:3] is the field of board revision info. */ - if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1) < 0) { + ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1); +#endif + if (ret < 0) { printf("Error reading i2c boot information!\n"); return 0; } @@ -200,7 +228,12 @@ int esdhc_status_fixup(void *blob, const char *compat) * 10 - eMMC Memory * 11 - SPI */ - if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0) { +#if defined(CONFIG_DM_I2C) + ret = dm_i2c_read(dev, I2C_MUX_IO_0, &io, 1); +#else + ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1); +#endif + if (ret < 0) { printf("Error reading i2c boot information!\n"); return 0; } @@ -231,16 +264,63 @@ int ft_board_setup(void *blob, bd_t *bd) static int switch_to_bank1(void) { - u8 data; - int ret; + u8 data = 0xf4, chip_addr = 0x24, offset_addr = 0x03; + int ret, bus_num = 0; - i2c_set_bus_num(0); +#if defined(CONFIG_DM_I2C) + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(bus_num, chip_addr, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return -ENXIO; + } + /* + * -------------------------------------------------------------------------------- + * | I2C bus | I2C address | Device | Notes | + * -------------------------------------------------------------------------------- + * | I2C1 | 0x24, 0x25, 0x26 | IO expander (CFG,| Provides 16bits of General | + * | | | RESET, and INT/ | Purpose parallel Input/Output| + * | | | KW41GPIO) - NXP | (GPIO) expansion for the | + * | | | PCAL9555AHF | I2C bus | + * -------------------------------------------------------------------------------- + * - mount three IO expander(PCAL9555AHF) on I2C1 + * + * PCAL9555A device address + * slave address + * -------------------------------------- + * | 0 | 1 | 0 | 0 | A2 | A1 | A0 | R/W | + * -------------------------------------- + * | fixed | hardware selectable| + * + * Output port 1(Pinter register bits = 0x03) + * + * P1_[7~0] = 0xf4 + * P1_0 <---> CFG_MUX_QSPI_S0 + * P1_1 <---> CFG_MUX_QSPI_S1 + * CFG_MUX_QSPI_S[1:0] = 0b00 + * + * QSPI chip-select demultiplexer select + * ---------------------------------------------------------------------------- + * | CFG_MUX_QSPI_S1 | CFG_MUX_QSPI_S0 | Values | + * --------------------------------------------------------------------------- + * | 0 | 0 |CS routed to SPI memory bank1(default)| + * ---------------------------------------------------------------------------- + * | 0 | 1 |CS routed to SPI memory bank2 | + * ---------------------------------------------------------------------------- + * + */ + ret = dm_i2c_write(dev, offset_addr, &data, 1); +#else /* Non DM I2C support - will be removed */ + i2c_set_bus_num(bus_num); + ret = i2c_write(chip_addr, offset_addr, 1, &data, 1); +#endif - data = 0xf4; - ret = i2c_write(0x24, 0x3, 1, &data, 1); if (ret) { printf("i2c write error to chip : %u, addr : %u, data : %u\n", - 0x24, 0x3, data); + chip_addr, offset_addr, data); } return ret; @@ -248,25 +328,44 @@ static int switch_to_bank1(void) static int switch_to_bank2(void) { - u8 data; - int ret; + u8 data[2] = {0xfc, 0xf5}, offset_addr[2] = {0x7, 0x3}, chip_addr = 0x24; + int ret, i, bus_num = 0; - i2c_set_bus_num(0); +#if defined(CONFIG_DM_I2C) + struct udevice *dev; - data = 0xfc; - ret = i2c_write(0x24, 0x7, 1, &data, 1); + ret = i2c_get_chip_for_busnum(bus_num, chip_addr, + 1, &dev); if (ret) { - printf("i2c write error to chip : %u, addr : %u, data : %u\n", - 0x24, 0x7, data); - goto err; + printf("%s: Cannot find udev for a bus %d\n", __func__, + bus_num); + return -ENXIO; } +#else /* Non DM I2C support - will be removed */ + i2c_set_bus_num(bus_num); +#endif - data = 0xf5; - ret = i2c_write(0x24, 0x3, 1, &data, 1); - if (ret) { - printf("i2c write error to chip : %u, addr : %u, data : %u\n", - 0x24, 0x3, data); + /* + * 1th step: config port 1 + * - the port 1 pin is enabled as an output + * 2th step: output port 1 + * - P1_[7:0] output 0xf5, + * then CFG_MUX_QSPI_S[1:0] equal to 0b01, + * CS routed to SPI memory bank2 + */ + for (i = 0; i < sizeof(data); i++) { +#if defined(CONFIG_DM_I2C) + ret = dm_i2c_write(dev, offset_addr[i], &data[i], 1); +#else /* Non DM I2C support - will be removed */ + ret = i2c_write(chip_addr, offset_addr[i], 1, &data[i], 1); +#endif + if (ret) { + printf("i2c write error to chip : %u, addr : %u, data : %u\n", + chip_addr, offset_addr[i], data[i]); + goto err; + } } + err: return ret; }