| Message ID | 20191026112458.35241-2-xiaowei.bao@nxp.com |
|---|---|
| State | Superseded |
| Delegated to: | Priyanka Jain |
| Headers | show |
| Series | Add the SPI DM support for PPC | expand |
>-----Original Message----- >From: Xiaowei Bao <xiaowei.bao@nxp.com> >Sent: Saturday, October 26, 2019 4:55 PM >To: wd@denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Shengzhou Liu ><shengzhou.liu@nxp.com>; u-boot@lists.denx.de; patrick.delaunay@st.com >Cc: Xiaowei Bao <xiaowei.bao@nxp.com> >Subject: [PATCH 01/29] dts: P1020: Add ESPI DT nodes > >Add ESPI controller DT node for P1020. > >Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> >--- > arch/powerpc/dts/p1020-post.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > >diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020- >post.dtsi >index 1e5e678..efb104f 100644 >--- a/arch/powerpc/dts/p1020-post.dtsi >+++ b/arch/powerpc/dts/p1020-post.dtsi >@@ -24,6 +24,15 @@ > single-cpu-affinity; > last-interrupt-source = <255>; > }; >+ >+ espi0: spi@7000 { >+ compatible = "fsl,mpc8536-espi"; >+ #address-cells = <1>; >+ #size-cells = <0>; >+ reg = <0x7000 0x1000>; >+ fsl,espi-num-chipselects = <4>; >+ status = "disabled"; >+ }; > }; > > /* PCIe controller base address 0x9000 */ >-- >2.9.5 There has been many changes in SPI driver now. Please help to rebase and resend the series. Regards Priyanka
diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi index 1e5e678..efb104f 100644 --- a/arch/powerpc/dts/p1020-post.dtsi +++ b/arch/powerpc/dts/p1020-post.dtsi @@ -24,6 +24,15 @@ single-cpu-affinity; last-interrupt-source = <255>; }; + + espi0: spi@7000 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7000 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; /* PCIe controller base address 0x9000 */
Add ESPI controller DT node for P1020. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- arch/powerpc/dts/p1020-post.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)