From patchwork Wed Sep 4 10:31:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 1157587 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="m4s4TYOE"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46NgKt2TVtz9sBF for ; Wed, 4 Sep 2019 20:39:14 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 113B2C21DB5; Wed, 4 Sep 2019 10:35:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id AAE27C21E79; Wed, 4 Sep 2019 10:33:39 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3373FC21E53; Wed, 4 Sep 2019 10:33:22 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lists.denx.de (Postfix) with ESMTPS id 863A1C21E0B for ; Wed, 4 Sep 2019 10:33:19 +0000 (UTC) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x84AXHxG055865; Wed, 4 Sep 2019 05:33:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1567593197; bh=wtguZMJhvyW01WYowvCuiMgi7c+/PDZXH/G3zzliSSw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=m4s4TYOEhSni5AmuD0B1tfKdt5MwifxwkBQa1AW6F/7HNrg93/BhhROo6hd+G9CJK Pxv2WoHbWpRzcXPgklC59o7OiET8Oa5ht8zgbkxT4OthhUDe3p6FQy68ui+H+rzLLC 4p+jBM7q2zwCBwLsDy4PHpWduAI/8x0ebzsjRL2M= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x84AXHxc026532; Wed, 4 Sep 2019 05:33:17 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 4 Sep 2019 05:33:17 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 4 Sep 2019 05:33:17 -0500 Received: from uda0131933.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x84AWYUs122466; Wed, 4 Sep 2019 05:33:15 -0500 From: Lokesh Vutla To: Tom Rini , Date: Wed, 4 Sep 2019 16:01:40 +0530 Message-ID: <20190904103151.20121-16-lokeshvutla@ti.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190904103151.20121-1-lokeshvutla@ti.com> References: <20190904103151.20121-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: fabien.dessenne@st.com, Tero Kristo Subject: [U-Boot] [PATCH v2 15/26] arm: dts: k3-j721e-main: Add C71x DSP node X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The J721E SoCs have a single TMS320C71x DSP Subsystem in the MAIN voltage domain containing the next-generation C711 CPU core. The subsystem has 32 KB of L1D configurable SRAM/Cache and 512 KB of L2 configurable SRAM/Cache. This subsystem has a CMMU but is not used currently. The inter-processor communication between the main A72 cores and the C711 processor is achieved through shared memory and a Mailbox. Add the DT node for this DSP processor sub-system in the common k3-j721e-main.dtsi file. Signed-off-by: Suman Anna Signed-off-by: Lokesh Vutla --- arch/arm/dts/k3-j721e-common-proc-board.dts | 1 + arch/arm/dts/k3-j721e-main.dtsi | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts index a548277718..b21f597a80 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-common-proc-board.dts @@ -22,6 +22,7 @@ remoteproc5 = &main_r5fss1_core1; remoteproc6 = &c66_0; remoteproc7 = &c66_1; + remoteproc8 = &c71_0; }; }; diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi index c3aa0cdcf1..6bd59bac52 100644 --- a/arch/arm/dts/k3-j721e-main.dtsi +++ b/arch/arm/dts/k3-j721e-main.dtsi @@ -328,4 +328,15 @@ ti,sci-proc-ids = <0x04 0xFF>; resets = <&k3_reset 143 1>; }; + + c71_0: dsp@64800000 { + compatible = "ti,j721e-c71-dsp"; + reg = <0x00 0x64800000 0x00 0x00080000>, + <0x00 0x64e00000 0x00 0x0000c000>; + reg-names = "l2sram", "l1dram"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <15>; + ti,sci-proc-ids = <0x30 0xFF>; + resets = <&k3_reset 15 1>; + }; };