Message ID | 20190828092435.19643-1-rka@sysgo.com |
---|---|
State | Changes Requested |
Delegated to: | Tom Rini |
Headers | show |
Series | [U-Boot,v2] ata: ahci allow 64-bit DMA for SATA | expand |
On Wed, Aug 28, 2019 at 11:24:35AM +0200, Roman Kapl wrote: > Allow 64-bit DMA on AHCI. If not supported by the host controller, at > least print a message and fail. > > Signed-off-by: Roman Kapl <rka@sysgo.com> > --- > > Please disregard the previous patch, I've send a wrong version that does not > even compile. > > drivers/ata/ahci.c | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c > index 9a08575053..fd4df60a17 100644 > --- a/drivers/ata/ahci.c > +++ b/drivers/ata/ahci.c > @@ -50,6 +50,8 @@ struct ahci_uc_priv *probe_ent = NULL; > #define WAIT_MS_FLUSH 5000 > #define WAIT_MS_LINKUP 200 > > +#define AHCI_CAP_S64A (1u << 31) > + > __weak void __iomem *ahci_port_base(void __iomem *base, u32 port) > { > return base + 0x100 + (port * 0x80); > @@ -503,9 +505,15 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port, > } > > for (i = 0; i < sg_count; i++) { > - ahci_sg->addr = > - cpu_to_le32((unsigned long) buf + i * MAX_DATA_BYTE_COUNT); > - ahci_sg->addr_hi = 0; > + /* We assume virt=phys */ > + phys_addr_t pa = (unsigned long)buf + i * MAX_DATA_BYTE_COUNT; > + > + ahci_sg->addr = cpu_to_le32(pa & U32_MAX); > + ahci_sg->addr_hi = cpu_to_le32((pa >> 32) & U32_MAX); > + if (ahci_sg->addr_hi && !(uc_priv->cap & AHCI_CAP_S64A)) { > + printf("Error: DMA address too high\n"); > + return -1; > + } > ahci_sg->flags_size = cpu_to_le32(0x3fffff & > (buf_len < MAX_DATA_BYTE_COUNT > ? (buf_len - 1) This version breaks building on qemu_arm: arm: + qemu_arm +(qemu_arm) In file included from arch/arm/include/asm/byteorder.h:29:0, +(qemu_arm) from include/compiler.h:128, +(qemu_arm) from include/image.h:18, +(qemu_arm) from include/common.h:41, +(qemu_arm) from drivers/ata/ahci.c:11: +(qemu_arm) drivers/ata/ahci.c: In function 'ahci_fill_sg': +(qemu_arm) drivers/ata/ahci.c:512:38: error: right shift count >= width of type [-Werror=shift-count-overflow] +(qemu_arm) ahci_sg->addr_hi = cpu_to_le32((pa >> 32) & U32_MAX); +(qemu_arm) ^ +(qemu_arm) include/linux/byteorder/little_endian.h:34:51: note: in definition of macro '__cpu_to_le32' +(qemu_arm) #define __cpu_to_le32(x) ((__force __le32)(__u32)(x)) +(qemu_arm) ^ +(qemu_arm) drivers/ata/ahci.c:512:22: note: in expansion of macro 'cpu_to_le32' +(qemu_arm) ^~~~~~~~~~~ +(qemu_arm) cc1: all warnings being treated as errors +(qemu_arm) make[3]: *** [drivers/ata/ahci.o] Error 1 +(qemu_arm) make[2]: *** [drivers/ata] Error 2 +(qemu_arm) make[1]: *** [drivers] Error 2 +(qemu_arm) make: *** [sub-make] Error 2
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 9a08575053..fd4df60a17 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -50,6 +50,8 @@ struct ahci_uc_priv *probe_ent = NULL; #define WAIT_MS_FLUSH 5000 #define WAIT_MS_LINKUP 200 +#define AHCI_CAP_S64A (1u << 31) + __weak void __iomem *ahci_port_base(void __iomem *base, u32 port) { return base + 0x100 + (port * 0x80); @@ -503,9 +505,15 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port, } for (i = 0; i < sg_count; i++) { - ahci_sg->addr = - cpu_to_le32((unsigned long) buf + i * MAX_DATA_BYTE_COUNT); - ahci_sg->addr_hi = 0; + /* We assume virt=phys */ + phys_addr_t pa = (unsigned long)buf + i * MAX_DATA_BYTE_COUNT; + + ahci_sg->addr = cpu_to_le32(pa & U32_MAX); + ahci_sg->addr_hi = cpu_to_le32((pa >> 32) & U32_MAX); + if (ahci_sg->addr_hi && !(uc_priv->cap & AHCI_CAP_S64A)) { + printf("Error: DMA address too high\n"); + return -1; + } ahci_sg->flags_size = cpu_to_le32(0x3fffff & (buf_len < MAX_DATA_BYTE_COUNT ? (buf_len - 1)
Allow 64-bit DMA on AHCI. If not supported by the host controller, at least print a message and fail. Signed-off-by: Roman Kapl <rka@sysgo.com> --- Please disregard the previous patch, I've send a wrong version that does not even compile. drivers/ata/ahci.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)