From patchwork Wed Jul 24 02:59:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanhua Han X-Patchwork-Id: 1135993 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45tgKr4QKMz9s4Y for ; Wed, 24 Jul 2019 13:09:04 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 2E9F6C21C27; Wed, 24 Jul 2019 03:08:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 16EB3C21DC1; Wed, 24 Jul 2019 03:08:35 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id F03D8C21DB6; Wed, 24 Jul 2019 03:08:31 +0000 (UTC) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lists.denx.de (Postfix) with ESMTPS id 4896AC21D9A for ; Wed, 24 Jul 2019 03:08:31 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 774E0200143; Wed, 24 Jul 2019 05:08:30 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A2FCD200034; Wed, 24 Jul 2019 05:08:25 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 7FC0440285; Wed, 24 Jul 2019 11:08:19 +0800 (SGT) From: Chuanhua Han To: albert.u.boot@aribaud.net, prabhakar.kushwaha@nxp.com, priyanka.jain@nxp.com, rajesh.bhagat@nxp.com Date: Wed, 24 Jul 2019 02:59:01 +0000 Message-Id: <20190724025904.469-1-chuanhua.han@nxp.com> X-Mailer: git-send-email 2.9.5 X-Virus-Scanned: ClamAV using ClamSMTP Cc: u-boot@lists.denx.de, Chuanhua Han , trini@konsulko.com Subject: [U-Boot] [PATCH 1/4] rtc: ds3232/ds3231: Add support to generate 32KHz output for driver module X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch add an implementation of the rtc_enable_32khz_output() that uses the driver model i2c APIs. Signed-off-by: Chuanhua Han --- depends on: - http://patchwork.ozlabs.org/project/uboot/list/?series=118772 - http://patchwork.ozlabs.org/project/uboot/list/?series=117226 drivers/rtc/Kconfig | 10 ++++++++++ drivers/rtc/ds3231.c | 21 +++++++++++++++++++++ include/rtc.h | 6 ++++++ 3 files changed, 37 insertions(+) diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index fd0009b..040d241 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -31,6 +31,12 @@ config TPL_DM_RTC drivers to perform the actual functions. See rtc.h for a description of the API. +config RTC_ENABLE_32KHZ_OUTPUT + bool "Enable RTC 32Khz output" + help + Some real-time clocks support the output of 32kHz square waves (such as ds3231), + the config symbol choose Real Time Clock device 32Khz output feature. + config RTC_PCF2127 bool "Enable PCF2127 driver" depends on DM_RTC @@ -41,6 +47,10 @@ config RTC_PCF2127 has a selectable I2C-bus or SPI-bus, a backup battery switch-over circuit, a programmable watchdog function, a timestamp function, and many other features. +config DS3231_BUS_NUM + hex "I2C bus of the DS3231 device" + default 0 + config RTC_DS1307 bool "Enable DS1307 driver" depends on DM_RTC diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c index 79b026a..dbd77a6 100644 --- a/drivers/rtc/ds3231.c +++ b/drivers/rtc/ds3231.c @@ -148,11 +148,13 @@ void rtc_reset (void) /* * Enable 32KHz output */ +#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT void rtc_enable_32khz_output(void) { rtc_write(RTC_STAT_REG_ADDR, RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ); } +#endif /* * Helper functions @@ -251,6 +253,25 @@ static int ds3231_probe(struct udevice *dev) return 0; } +#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT +void rtc_enable_32khz_output(void) +{ + int ret; + struct udevice *dev; + +#ifdef CONFIG_DS3231_BUS_NUM + ret = i2c_get_chip_for_busnum(CONFIG_DS3231_BUS_NUM, + CONFIG_SYS_I2C_RTC_ADDR, 1, &dev); +#else + ret = i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_RTC_ADDR, 1, &dev); +#endif + if (!ret) + dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR, + RTC_STAT_BIT_BB32KHZ | + RTC_STAT_BIT_EN32KHZ); +} +#endif + static const struct rtc_ops ds3231_rtc_ops = { .get = ds3231_rtc_get, .set = ds3231_rtc_set, diff --git a/include/rtc.h b/include/rtc.h index b255bdc..df7de09 100644 --- a/include/rtc.h +++ b/include/rtc.h @@ -166,11 +166,17 @@ int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep); */ int rtc_write32(struct udevice *dev, unsigned int reg, u32 value); +#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT +void rtc_enable_32khz_output(void); +#endif + #else int rtc_get (struct rtc_time *); int rtc_set (struct rtc_time *); void rtc_reset (void); +#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT void rtc_enable_32khz_output(void); +#endif /** * rtc_read8() - Read an 8-bit register