diff mbox series

[U-Boot,12/47] powerpc: T102xRDB: Remove the useless macro CONFIG_ARCH_T1040

Message ID 20190723130938.47805-13-Zhiqiang.Hou@nxp.com
State Superseded
Delegated to: Prabhakar Kushwaha
Headers show
Series powerpc: Enable PCIe DM drvier for some platforms | expand

Commit Message

Z.Q. Hou July 23, 2019, 1:09 p.m. UTC 
Remove the macro CONFIG_ARCH_T1040 from the T102xRDB.h and
the PCIE4 related macros, as there are only 3 PCIe controllers
on T102x SoCs.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 include/configs/T102xRDB.h | 24 ------------------------
 1 file changed, 24 deletions(-)

Comments

Bin Meng Aug. 26, 2019, 2:48 p.m. UTC | #1 
On Tue, Jul 23, 2019 at 9:31 PM Hou Zhiqiang <Zhiqiang.Hou@nxp.com> wrote:
>
> Remove the macro CONFIG_ARCH_T1040 from the T102xRDB.h and
> the PCIE4 related macros, as there are only 3 PCIe controllers
> on T102x SoCs.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
>  include/configs/T102xRDB.h | 24 ------------------------
>  1 file changed, 24 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff mbox series

Patch

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index cce65f5..3715e25 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -500,9 +500,6 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 #define CONFIG_PCIE2		/* PCIE controller 2 */
 #define CONFIG_PCIE3		/* PCIE controller 3 */
-#ifdef CONFIG_ARCH_T1040
-#define CONFIG_PCIE4		/* PCIE controller 4 */
-#endif
 #define CONFIG_FSL_PCI_INIT	/* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
 #define CONFIG_PCI_INDIRECT_BRIDGE
@@ -571,27 +568,6 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_PCIE3_IO_SIZE	0x00010000	/* 64k */
 #endif
 
-/* controller 4, Base address 203000, to be removed */
-#ifdef CONFIG_PCIE4
-#define CONFIG_SYS_PCIE4_MEM_VIRT       0xb0000000
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE4_MEM_BUS	0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_PHYS       0xc30000000ull
-#else
-#define CONFIG_SYS_PCIE4_MEM_BUS	0xb0000000
-#define CONFIG_SYS_PCIE4_MEM_PHYS	0xb0000000
-#endif
-#define CONFIG_SYS_PCIE4_MEM_SIZE       0x10000000      /* 256M */
-#define CONFIG_SYS_PCIE4_IO_VIRT	0xf8030000
-#define CONFIG_SYS_PCIE4_IO_BUS		0x00000000
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE4_IO_PHYS	0xff8030000ull
-#else
-#define CONFIG_SYS_PCIE4_IO_PHYS	0xf8030000
-#endif
-#define CONFIG_SYS_PCIE4_IO_SIZE	0x00010000      /* 64k */
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
 #endif	/* CONFIG_PCI */