From patchwork Tue Jul 16 11:57:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1132680 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="JNz42c7m"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45nzgv1Rvyz9s00 for ; Tue, 16 Jul 2019 22:08:26 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 92782C21E29; Tue, 16 Jul 2019 12:05:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id CCCD1C21DC1; Tue, 16 Jul 2019 12:02:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 20FABC21E3A; Tue, 16 Jul 2019 12:00:52 +0000 (UTC) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by lists.denx.de (Postfix) with ESMTPS id C3919C21E35 for ; Tue, 16 Jul 2019 12:00:48 +0000 (UTC) Received: by mail-pf1-f195.google.com with SMTP id m30so9013339pff.8 for ; Tue, 16 Jul 2019 05:00:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VZZq8s/MFgMQ4+KCax6f04xB7tKYUG01ZRKiMSlIBrI=; b=JNz42c7msePQb/qd4ACFMMUIEGF27xINdJ8K/zfiaoDrQT7qBZbrSdi7Tj5wmXSKpI 0CWVW80NB1nzvBbLVPFDUcuxltTpOzPAq1M8FsfyigXzKfwKbzFBb9+4WjrZpw973qWU dgkbc0D8CuyjAUiftNS662w8JsjJGE2Ts2Rd4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VZZq8s/MFgMQ4+KCax6f04xB7tKYUG01ZRKiMSlIBrI=; b=k3Cc2AQyq7ZLWSgnKybWw1mds4/XqSZ9YRA1C/PnjfL9Ofs471ic+YhNOVTYkKUYv5 ZFi8srEVVy4993bR1GKdzXVaAYilZ+ybqK+erJSOACyXvTspOGQmB/+vcL1x/Lvorlhq MYv5AWWOMkRRxihuvofREMBBVZrfDiNWen2/wnld1S/MlpKTG1PYacHVlinKCjrAGZhe BGcFKua/gk2e6mDD2shMNLoNw++XttRo+fEi00XF/0z8L9erBSjbWkl2lJMyuEUUwwHV MZFtluXmRP2FigISSWwGWwtxZe3C4nsTL2TMaLaIXgOa2GcTAlGciFYfY81dh1GoAuga tg/w== X-Gm-Message-State: APjAAAUKP6Ll/F7KDSlVZbQ709oucTOakYpiDlIyku0o6AXYJpWqcBDS 041Noi4LjtGHsoSM7+QX+DrYqw== X-Google-Smtp-Source: APXvYqzyDYzvWF9eb3T2/ToX1xZW9N6lIoYR2F28qs0ws76XPHiJRUk+n89Nu4yrzjPbg334REqzhg== X-Received: by 2002:a63:7a01:: with SMTP id v1mr33887212pgc.310.1563278447333; Tue, 16 Jul 2019 05:00:47 -0700 (PDT) Received: from localhost.localdomain ([49.206.201.107]) by smtp.gmail.com with ESMTPSA id z24sm36269566pfr.51.2019.07.16.05.00.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Jul 2019 05:00:46 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , YouMin Chen , u-boot@lists.denx.de Date: Tue, 16 Jul 2019 17:27:36 +0530 Message-Id: <20190716115745.12585-49-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190716115745.12585-1-jagan@amarulasolutions.com> References: <20190716115745.12585-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com, linux-amarula@amarulasolutions.com, Manivannan Sadhasivam Subject: [U-Boot] [PATCH v3 48/57] clk: rockchip: rk3399: Set 400MHz ddr clock X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add support for setting 400MHz ddr clock. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3399.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 1de21c9f3e..79007b8682 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -839,6 +839,10 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru, dpll_cfg = (struct pll_div) {.refdiv = 2, .fbdiv = 100, .postdiv1 = 4, .postdiv2 = 1}; break; + case 400 * MHz: + dpll_cfg = (struct pll_div) + {.refdiv = 1, .fbdiv = 50, .postdiv1 = 3, .postdiv2 = 1}; + break; case 666 * MHz: dpll_cfg = (struct pll_div) {.refdiv = 2, .fbdiv = 111, .postdiv1 = 2, .postdiv2 = 1};