From patchwork Mon Jun 17 07:32:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1116829 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="E5TjqQpt"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45S44J4Ry6z9sBr for ; Mon, 17 Jun 2019 18:24:00 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5DBC7C21FC9; Mon, 17 Jun 2019 08:07:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 08666C21EE7; Mon, 17 Jun 2019 07:57:17 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id F3B05C21E3B; Mon, 17 Jun 2019 07:41:01 +0000 (UTC) Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) by lists.denx.de (Postfix) with ESMTPS id C6972C21F16 for ; Mon, 17 Jun 2019 07:40:57 +0000 (UTC) Received: by mail-pf1-f193.google.com with SMTP id i189so5185752pfg.10 for ; Mon, 17 Jun 2019 00:40:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3scj5tpu65v2n66++2cTbZLzQWWaAK5Y+ewcl6Aa8Eo=; b=E5TjqQptKaiDZU7Y7PuLnxpI9PSn6NOS2+GueAz5igqmNSDenlwqhYlO49Tqqv2ODG 9XqftnE8PfjJlJSpFL0eF8y6zWjZ1LrA/IEf4qY5V7bTJj00L0nRonGbFcLuctaKNHX8 G7MSABeCzM/Z7Lg4E6ArkRKAMkdL6VVBVJGvI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3scj5tpu65v2n66++2cTbZLzQWWaAK5Y+ewcl6Aa8Eo=; b=IBXPaHYnIMXdbAyt+k0DeFuyLRe0mvkLGNhUryhACtXlOa6lsXZN/JqRaWYITYpLDC xAlDV8C4qF82Fqrui2+iV7qpGLpZbmIi9pjGrq3PBTaCaJA9joLX/2EzzbFQ+HOcwwP+ G4jKYupoGpr33mjZA70otAr6bNmYr1Wn0z1Mj6/Io5hxMHr/melnL7Gq35AASiT6gMmZ Qom6wGJy6eD9tFGlTO/uh/FPobuCBlBUMaA1eoHRzoAcvviNVBUzMDVAL4/8lcGWtG88 09CCc5USEv0pCkKiwF5Q/FNndJPQo9L0DlzOR44WUE4FFnACMYwYKu3LydFrK7p29hKo Dg4A== X-Gm-Message-State: APjAAAXca5uQB6fWWI0+VCzYtK39WSnuileIHa2Q2y5u9oiK9ZluBsqx Kz6AtyuXXS40q6cI0ggPcSDiHw== X-Google-Smtp-Source: APXvYqz/ZXE2q4c55juPsGQ+wHmSreuPKQyIVxDW9K35zDwdJuGsjBbFmFLEQ4ibJf/MRF3yLnpHrA== X-Received: by 2002:a63:e502:: with SMTP id r2mr19502433pgh.261.1560757256451; Mon, 17 Jun 2019 00:40:56 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.245]) by smtp.gmail.com with ESMTPSA id m41sm15205998pje.18.2019.06.17.00.40.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Jun 2019 00:40:56 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , YouMin Chen , u-boot@lists.denx.de Date: Mon, 17 Jun 2019 13:02:36 +0530 Message-Id: <20190617073252.27810-84-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190617073252.27810-1-jagan@amarulasolutions.com> References: <20190617073252.27810-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com, linux-amarula@amarulasolutions.com, Manivannan Sadhasivam Subject: [U-Boot] [PATCH v2 83/99] arm: include: rockchip: Add rk3399 pmu file X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add pmu header file for rk3399 SoC, this will help to configure pmu in sdram driver. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- .../include/asm/arch-rockchip/pmu_rk3399.h | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/pmu_rk3399.h diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h b/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h new file mode 100644 index 0000000000..f1096dccce --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 Rockchip Electronics Co., Ltd. + * + */ + +#ifndef __SOC_ROCKCHIP_RK3399_PMU_H__ +#define __SOC_ROCKCHIP_RK3399_PMU_H__ + +struct rk3399_pmu_regs { + u32 pmu_wakeup_cfg[5]; + u32 pmu_pwrdn_con; + u32 pmu_pwrdn_st; + u32 pmu_pll_con; + u32 pmu_pwrmode_con; + u32 pmu_sft_con; + u32 pmu_int_con; + u32 pmu_int_st; + u32 pmu_gpio0_pos_int_con; + u32 pmu_gpio0_net_int_con; + u32 pmu_gpio1_pos_int_con; + u32 pmu_gpio1_net_int_con; + u32 pmu_gpio0_pos_int_st; + u32 pmu_gpio0_net_int_st; + u32 pmu_gpio1_pos_int_st; + u32 pmu_gpio1_net_int_st; + u32 pmu_pwrdn_inten; + u32 pmu_pwrdn_status; + u32 pmu_wakeup_status; + u32 pmu_bus_clr; + u32 pmu_bus_idle_req; + u32 pmu_bus_idle_st; + u32 pmu_bus_idle_ack; + u32 pmu_cci500_con; + u32 pmu_adb400_con; + u32 pmu_adb400_st; + u32 pmu_power_st; + u32 pmu_core_pwr_st; + u32 pmu_osc_cnt; + u32 pmu_plllock_cnt; + u32 pmu_pllrst_cnt; + u32 pmu_stable_cnt; + u32 pmu_ddrio_pwron_cnt; + u32 pmu_wakeup_rst_clr_cnt; + u32 pmu_ddr_sref_st; + u32 pmu_scu_l_pwrdn_cnt; + u32 pmu_scu_l_pwrup_cnt; + u32 pmu_scu_b_pwrdn_cnt; + u32 pmu_scu_b_pwrup_cnt; + u32 pmu_gpu_pwrdn_cnt; + u32 pmu_gpu_pwrup_cnt; + u32 pmu_center_pwrdn_cnt; + u32 pmu_center_pwrup_cnt; + u32 pmu_timeout_cnt; + u32 pmu_cpu0apm_con; + u32 pmu_cpu1apm_con; + u32 pmu_cpu2apm_con; + u32 pmu_cpu3apm_con; + u32 pmu_cpu0bpm_con; + u32 pmu_cpu1bpm_con; + u32 pmu_noc_auto_ena; + u32 pmu_pwrdn_con1; + u32 reserved0[0x4]; + u32 pmu_sys_reg_reg0; + u32 pmu_sys_reg_reg1; + u32 pmu_sys_reg_reg2; + u32 pmu_sys_reg_reg3; +}; + +check_member(rk3399_pmu_regs, pmu_sys_reg_reg3, 0xfc); + +#endif /* __SOC_ROCKCHIP_RK3399_PMU_H__ */