From patchwork Mon Jun 17 07:32:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1116812 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="Ex7J857t"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45S3xJ4H69z9s3l for ; Mon, 17 Jun 2019 18:17:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 012BAC21F24; Mon, 17 Jun 2019 08:02:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 60F7FC21FC4; Mon, 17 Jun 2019 07:46:59 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3609DC21FC0; Mon, 17 Jun 2019 07:40:18 +0000 (UTC) Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) by lists.denx.de (Postfix) with ESMTPS id 0BB36C21DFB for ; Mon, 17 Jun 2019 07:40:15 +0000 (UTC) Received: by mail-pl1-f194.google.com with SMTP id t7so3728062plr.11 for ; Mon, 17 Jun 2019 00:40:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IJlTrExUV036P/BMRgn4pTMf63sVmYGkjOW1YSSrKmc=; b=Ex7J857tEAgIauusvHb973ko1n1akqCRoR/8F3KmHAfleuZMB54S+P+iiK92HN4aOs HeL/Joow/btz62k+fWlU3ZSMhb6JtDYgFVgZRxcuPYnPI8RdaPnySYMy9tLB/JB6pvZS SsaaBFS5UaY3kTvotwaZkcPAW+d/qCBOkVa0I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IJlTrExUV036P/BMRgn4pTMf63sVmYGkjOW1YSSrKmc=; b=monR/N4jT/jCzN+xu4+H1je5n3/MoWvgmwMhciUDmiS9M+f5eg/iP7Mj9zIH+ZSUjl zbA/BKm1LSPeqwhAkL8r3gkrzIumr2N2O+bvcJ5ORAdIBWOIV9qrQ6lJhBoQnlFNpeg6 ydxgIhCnl2O7uoQoWvaDV8PmBF0BD8CxjyyKu3Z5hHUVrpKuBifYp516UXVKDhYDnajj cDXvWsXna3KQA0972tT411mldbRLa5bOFowlNBRysBh/U7ALC+PS3gjcaT5kzaswsyzD f3CFZV01hkUcMyGZMPyh2kMRoh5yZjJK6/D0wgMzrfXQgWn3D3X0El1jzkhkHzcRNx+x qddw== X-Gm-Message-State: APjAAAUozcgMhsTz1NST21pkjXgeJOfpQhi5vedHpO0AT8NRBghPFrDT bWlW7SqBDKZqrwHgR7Wsk3lyOw== X-Google-Smtp-Source: APXvYqz/92GSJfV9kbMIR2t9eSiuX76F1aMFO9AAUYUiRtQMNTTibEoY9tVm6gol+bCWmXXHqrez9A== X-Received: by 2002:a17:902:f216:: with SMTP id gn22mr88263731plb.118.1560757213677; Mon, 17 Jun 2019 00:40:13 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.245]) by smtp.gmail.com with ESMTPSA id m41sm15205998pje.18.2019.06.17.00.40.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Jun 2019 00:40:13 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , YouMin Chen , u-boot@lists.denx.de Date: Mon, 17 Jun 2019 13:02:23 +0530 Message-Id: <20190617073252.27810-71-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190617073252.27810-1-jagan@amarulasolutions.com> References: <20190617073252.27810-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com, linux-amarula@amarulasolutions.com, Manivannan Sadhasivam Subject: [U-Boot] [PATCH v2 70/99] ram: rk3399: Configure tsel write ca for lpddr4 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" tsel write ca_p and ca_n values need to write on PHY 544, 672 and 800 to configure ds odt. Configure the same PHY register for lpddr4 would require a mask value of (300 << 8). Add support for it. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index e03181fbc9..41dd19a9e6 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -502,9 +502,18 @@ static void set_ds_odt(const struct chan_info *chan, /* phy_adr_tsel_select_ 8bits DENALI_PHY_544/672/800 offset_0 */ reg_value = tsel_wr_select_ca_n | (tsel_wr_select_ca_p << 0x4); - clrsetbits_le32(&denali_phy[544], 0xff, reg_value); - clrsetbits_le32(&denali_phy[672], 0xff, reg_value); - clrsetbits_le32(&denali_phy[800], 0xff, reg_value); + if (IS_ENABLED(CONFIG_RAM_RK3399_LPDDR4)) { + /* LPDDR4 these register read always return 0, so + * can not use clrsetbits_le32(), need to write32 + */ + writel((0x300 << 8) | reg_value, &denali_phy[544]); + writel((0x300 << 8) | reg_value, &denali_phy[672]); + writel((0x300 << 8) | reg_value, &denali_phy[800]); + } else { + clrsetbits_le32(&denali_phy[544], 0xff, reg_value); + clrsetbits_le32(&denali_phy[672], 0xff, reg_value); + clrsetbits_le32(&denali_phy[800], 0xff, reg_value); + } /* phy_pad_addr_drive 8bits DENALI_PHY_928 offset_0 */ clrsetbits_le32(&denali_phy[928], 0xff, reg_value);