@@ -60,6 +60,7 @@
SYS_REG_CS1_ROW_SHIFT(ch))
#define SYS_REG_BW_SHIFT(ch) (2 + (ch) * 16)
#define SYS_REG_BW_MASK 3
+#define SYS_REG_ENC_BW(n, ch) ((2 >> (n)) << SYS_REG_BW_SHIFT(ch))
#define SYS_REG_DBW_SHIFT(ch) ((ch) * 16)
#define SYS_REG_DBW_MASK 3
#define SYS_REG_ENC_DBW(n, ch) ((2 >> (n)) << SYS_REG_DBW_SHIFT(ch))
@@ -1027,7 +1027,7 @@ static void dram_all_config(struct dram_info *dram,
sys_reg |= SYS_REG_ENC_BK(info->bk, channel);
sys_reg |= SYS_REG_ENC_CS0_ROW(info->cs0_row, channel);
sys_reg |= SYS_REG_ENC_CS1_ROW(info->cs1_row, channel);
- sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(channel);
+ sys_reg |= SYS_REG_ENC_BW(info->bw, channel);
sys_reg |= SYS_REG_ENC_DBW(info->dbw, channel);
ddr_msch_regs = dram->chan[channel].msch;