From patchwork Sun Jun 9 01:46:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1112592 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45LzgV5spRz9s6w for ; Sun, 9 Jun 2019 11:48:22 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 713C0C21F92; Sun, 9 Jun 2019 01:47:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 64DC9C21F7E; Sun, 9 Jun 2019 01:47:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C6FBEC21F42; Sun, 9 Jun 2019 01:47:32 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by lists.denx.de (Postfix) with ESMTPS id D42CCC21E9F for ; Sun, 9 Jun 2019 01:47:31 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 45LzfW3075z1rZmr; Sun, 9 Jun 2019 03:47:31 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 45LzfW2dxzz1qql2; Sun, 9 Jun 2019 03:47:31 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id rACfUeqQ-QOT; Sun, 9 Jun 2019 03:47:30 +0200 (CEST) X-Auth-Info: EGiQlSCBw8rqNZ6VkV18Dh0qXfhh7c+dkysmadmK0eY= Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz [86.49.110.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sun, 9 Jun 2019 03:47:30 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 9 Jun 2019 03:46:22 +0200 Message-Id: <20190609014622.14067-2-marex@denx.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190609014622.14067-1-marex@denx.de> References: <20190609014622.14067-1-marex@denx.de> MIME-Version: 1.0 Cc: Marek Vasut , Peng Fan Subject: [U-Boot] [PATCH V2 2/2] watchdog: imx: Add DM support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add DM and DT probing support to iMX watchdog driver. This should allow boards to move over to this driver, enable SYSRESET_WATCHDOG to handle cpu_reset() if required. Signed-off-by: Marek Vasut Cc: Peng Fan Cc: Stefano Babic Tested-by: Heiko Schocher --- V2: No change --- drivers/watchdog/Kconfig | 2 +- drivers/watchdog/imx_watchdog.c | 119 +++++++++++++++++++++++++++----- 2 files changed, 104 insertions(+), 17 deletions(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 0330a3b3a1..5993865647 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -136,7 +136,7 @@ config XILINX_TB_WATCHDOG config IMX_WATCHDOG bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP" - select HW_WATCHDOG + select HW_WATCHDOG if !WDT help Select this to enable the IMX and LSCH2 of Layerscape watchdog driver. diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 14cc618074..53a3e9f5c7 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -5,7 +5,9 @@ */ #include +#include #include +#include #include #include #ifdef CONFIG_FSL_LSCH2 @@ -13,20 +15,40 @@ #endif #include -#ifdef CONFIG_IMX_WATCHDOG -void hw_watchdog_reset(void) +static void imx_watchdog_expire_now(struct watchdog_regs *wdog) +{ + clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE); + + writew(0x5555, &wdog->wsr); + writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ + while (1) { + /* + * spin for .5 seconds before reset + */ + } +} + +#if !defined(CONFIG_IMX_WATCHDOG) || \ + (defined(CONFIG_IMX_WATCHDOG) && !CONFIG_IS_ENABLED(WDT)) +void __attribute__((weak)) reset_cpu(ulong addr) { -#ifndef CONFIG_WATCHDOG_RESET_DISABLE struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; + imx_watchdog_expire_now(wdog); +} +#endif + +#if defined(CONFIG_IMX_WATCHDOG) +static void imx_watchdog_reset(struct watchdog_regs *wdog) +{ +#ifndef CONFIG_WATCHDOG_RESET_DISABLE writew(0x5555, &wdog->wsr); writew(0xaaaa, &wdog->wsr); #endif /* CONFIG_WATCHDOG_RESET_DISABLE*/ } -void hw_watchdog_init(void) +static void imx_watchdog_init(struct watchdog_regs *wdog) { - struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; u16 timeout; /* @@ -44,21 +66,86 @@ void hw_watchdog_init(void) writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS | WCR_WDA | SET_WCR_WT(timeout), &wdog->wcr); #endif /* CONFIG_FSL_LSCH2*/ - hw_watchdog_reset(); + imx_watchdog_reset(wdog); } -#endif -void __attribute__((weak)) reset_cpu(ulong addr) +#if !CONFIG_IS_ENABLED(WDT) +void hw_watchdog_reset(void) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE); + imx_watchdog_reset(wdog); +} - writew(0x5555, &wdog->wsr); - writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ - while (1) { - /* - * spin for .5 seconds before reset - */ - } +void hw_watchdog_init(void) +{ + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; + + imx_watchdog_init(wdog); +} +#else +struct imx_wdt_priv { + void __iomem *base; +}; + +static int imx_wdt_reset(struct udevice *dev) +{ + struct imx_wdt_priv *priv = dev_get_priv(dev); + + imx_watchdog_reset(priv->base); + + return 0; +} + +static int imx_wdt_expire_now(struct udevice *dev, ulong flags) +{ + struct imx_wdt_priv *priv = dev_get_priv(dev); + + imx_watchdog_expire_now(priv->base); + hang(); + + return 0; +} + +static int imx_wdt_start(struct udevice *dev, u64 timeout, ulong flags) +{ + struct imx_wdt_priv *priv = dev_get_priv(dev); + + imx_watchdog_init(priv->base); + + return 0; +} + +static int imx_wdt_probe(struct udevice *dev) +{ + struct imx_wdt_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOENT; + + return 0; } + +static const struct wdt_ops imx_wdt_ops = { + .start = imx_wdt_start, + .reset = imx_wdt_reset, + .expire_now = imx_wdt_expire_now, +}; + +static const struct udevice_id imx_wdt_ids[] = { + { .compatible = "fsl,imx21-wdt" }, + {} +}; + +U_BOOT_DRIVER(imx_wdt) = { + .name = "imx_wdt", + .id = UCLASS_WDT, + .of_match = imx_wdt_ids, + .probe = imx_wdt_probe, + .ops = &imx_wdt_ops, + .priv_auto_alloc_size = sizeof(struct imx_wdt_priv), + .flags = DM_FLAG_PRE_RELOC, +}; +#endif +#endif