diff mbox series

[U-Boot,3/7] armv8: dts: fsl-lx2160a: add i2c controller and gpio DT nodes

Message ID 20190523092207.41906-3-chuanhua.han@nxp.com
State Superseded
Delegated to: Prabhakar Kushwaha
Headers show
Series [U-Boot,1/7] armv8: lx2160a: The lx2160a platform supports the I2C driver model. | expand

Commit Message

Chuanhua Han May 23, 2019, 9:22 a.m. UTC 
In lx2160a soc, there are eight i2c controllers, this patch adds i2c
nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
depends.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
---
 arch/arm/dts/fsl-lx2160a.dtsi | 101 ++++++++++++++++++++++++++++++++++
 1 file changed, 101 insertions(+)

Comments

Heiko Schocher May 24, 2019, 4:50 a.m. UTC | #1 
Hello Chuanhua Han,

Am 23.05.2019 um 11:22 schrieb Chuanhua Han:
> In lx2160a soc, there are eight i2c controllers, this patch adds i2c
> nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
> depends.
> 
> Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
> ---
>   arch/arm/dts/fsl-lx2160a.dtsi | 101 ++++++++++++++++++++++++++++++++++
>   1 file changed, 101 insertions(+)

Reviewed-by: Heiko Schocher <hs@denx.de>

bye,
Heiko
diff mbox series

Patch

diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 28220781d3..8a91cdb7dc 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -49,6 +49,96 @@ 
 			     <1 10 0x8>; /* Hypervisor PPI, active-low */
 	};
 
+	i2c0: i2c@2000000 {
+		compatible = "fsl,vf610-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x2000000 0x0 0x10000>;
+		interrupts = <0 34 4>;
+		clock-names = "i2c";
+		clocks = <&clockgen 4 7>;
+		scl-gpio = <&gpio2 15 0>;
+		status = "disabled";
+	};
+
+	i2c1: i2c@2010000 {
+		compatible = "fsl,vf610-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x2010000 0x0 0x10000>;
+		interrupts = <0 34 4>;
+		clock-names = "i2c";
+		clocks = <&clockgen 4 7>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@2020000 {
+		compatible = "fsl,vf610-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x2020000 0x0 0x10000>;
+		interrupts = <0 35 4>;
+		clock-names = "i2c";
+		clocks = <&clockgen 4 7>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@2030000 {
+		compatible = "fsl,vf610-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x2030000 0x0 0x10000>;
+		interrupts = <0 35 4>;
+		clock-names = "i2c";
+		clocks = <&clockgen 4 7>;
+		status = "disabled";
+	};
+
+	i2c4: i2c@2040000 {
+		compatible = "fsl,vf610-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x2040000 0x0 0x10000>;
+		interrupts = <0 74 4>;
+		clock-names = "i2c";
+		clocks = <&clockgen 4 7>;
+		scl-gpio = <&gpio2 16 0>;
+		status = "disabled";
+	};
+
+	i2c5: i2c@2050000 {
+		compatible = "fsl,vf610-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x2050000 0x0 0x10000>;
+		interrupts = <0 74 4>;
+		clock-names = "i2c";
+		clocks = <&clockgen 4 7>;
+		status = "disabled";
+	};
+
+	i2c6: i2c@2060000 {
+		compatible = "fsl,vf610-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x2060000 0x0 0x10000>;
+		interrupts = <0 75 4>;
+		clock-names = "i2c";
+		clocks = <&clockgen 4 7>;
+		status = "disabled";
+	};
+
+	i2c7: i2c@2070000 {
+		compatible = "fsl,vf610-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0x2070000 0x0 0x10000>;
+		interrupts = <0 75 4>;
+		clock-names = "i2c";
+		clocks = <&clockgen 4 7>;
+		status = "disabled";
+	};
+
 	uart0: serial@21c0000 {
 		compatible = "arm,pl011";
 		reg = <0x0 0x21c0000 0x0 0x1000>;
@@ -102,6 +192,17 @@ 
 		num-cs = <6>;
 	};
 
+	gpio2: gpio@2320000 {
+		compatible = "fsl,qoriq-gpio";
+		reg = <0x0 0x2320000 0x0 0x10000>;
+		interrupts = <0 37 4>;
+		gpio-controller;
+		little-endian;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
 	usb0: usb3@3100000 {
 		compatible = "fsl,layerscape-dwc3";
 		reg = <0x0 0x3100000 0x0 0x10000>;