From patchwork Thu May 16 03:18:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100264 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="baB7ahOD"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454GwH5rmKz9sD4 for ; Thu, 16 May 2019 13:23:27 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 703D9C21DA1; Thu, 16 May 2019 03:19:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 36A0CC21C4A; Thu, 16 May 2019 03:19:13 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id ACC56C21DDC; Thu, 16 May 2019 03:19:04 +0000 (UTC) Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-eopbgr150079.outbound.protection.outlook.com [40.107.15.79]) by lists.denx.de (Postfix) with ESMTPS id 29B74C21D4A for ; Thu, 16 May 2019 03:19:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0BhulCELVI/GFq6imrTK+N2hYQ+d5WaCtMUMqmOq0u0=; b=baB7ahODEgjYnpOt4Fi5p2G5k+utGABV9v9rZSxisqNNDXc32BAV72cM3fgbDn2RP4G9BZ8TysnL570CCMcqU9KZjBJd5gglB7/UidAw1zf/LLyH1d4HFQyYMutbI4uqZ1y7CpYYbumG+nEJZOt5qs7mymKygHMBwUTv83GaLTE= Received: from AM0PR04MB4481.eurprd04.prod.outlook.com (52.135.147.15) by AM0PR04MB6594.eurprd04.prod.outlook.com (20.179.255.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1878.24; Thu, 16 May 2019 03:18:59 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1878.024; Thu, 16 May 2019 03:18:59 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 04/15] i.MX7ULP: Fix system reset after a7 rtc alarm expired. Thread-Index: AQHVC5YarUPGkrLczkylFLgWGoR2jQ== Date: Thu, 16 May 2019 03:18:58 +0000 Message-ID: <20190516033236.10594-4-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 19ea6781-087b-4aed-a2ad-08d6d9ad3c69 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:AM0PR04MB6594; x-ms-traffictypediagnostic: AM0PR04MB6594: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:305; x-forefront-prvs: 0039C6E5C5 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(39860400002)(136003)(376002)(366004)(346002)(396003)(199004)(189003)(2906002)(3846002)(66556008)(6116002)(8676002)(73956011)(81166006)(186003)(66476007)(6436002)(81156014)(66066001)(86362001)(6486002)(2616005)(11346002)(446003)(26005)(64756008)(7736002)(305945005)(6512007)(486006)(44832011)(476003)(316002)(66946007)(5660300002)(102836004)(14444005)(256004)(8936002)(52116002)(54906003)(478600001)(1076003)(4326008)(71190400001)(71200400001)(36756003)(66446008)(14454004)(53936002)(110136005)(2501003)(386003)(68736007)(6506007)(76176011)(99286004)(25786009)(50226002); DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR04MB6594; H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: c+qEGkAgzOEe5ZMokgjoAXQG3vxC1On7eN13vIqyk4PrATgdeFwFe4WNyoMpeIpuU0gSgxfMpNMNIWZV8xw5hTQyUei8ZpZS+rzEXYvlUadUgYY51XPuXD/VRe1QBy/UbxiOu8FzeTm9irFF1AizNJxLO3/k1ZGCwVv3mQ5zisgX9QgNlXL8OO+50lK52b6oNoLezzty5iOtq+X2rNxqdNXndgicb0BzedV1uadJTDK97/8wNcrXJpgOAVEYJ0dwUH83fS1/sGSaCeT6bQHmDQTTqlzvZ74682O1wieYZFb1P76L86VZ/1UlrUHtUp8tx0kgplNfaG+VfHVulitUqUDA/yIvyMZ84WqN7C2UngSR3gZELxfeTDeVsjSldNAlZlpGZaucWoijdYL/h6m1yfvNLZxqJY52GvTmBEju69s= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 19ea6781-087b-4aed-a2ad-08d6d9ad3c69 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:18:58.9696 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , Jacky Bai , dl-uboot-imx Subject: [U-Boot] [PATCH 04/15] i.MX7ULP: Fix system reset after a7 rtc alarm expired. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Bai Ping The board will reboot if A7 core enter mem mode by rtc, then M4 core enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode to fix this issue. Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access it. So check the CPU rev and not apply the settings for B0. Signed-off-by: Bai Ping Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 7 +++++++ arch/arm/mach-imx/mx7ulp/soc.c | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h index d58ed43199..3c82e9921e 100644 --- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h @@ -58,6 +58,7 @@ #define USDHC1_AIPS2_SLOT (56) #define RGPIO2P0_AIPS0_SLOT (15) #define RGPIO2P1_AIPS2_SLOT (15) +#define SNVS_AIPS2_SLOT (35) #define IOMUXC0_AIPS0_SLOT (61) #define OCOTP_CTRL_AIPS1_SLOT (38) #define OCOTP_CTRL_PCC1_SLOT (38) @@ -177,6 +178,9 @@ #define USDHC0_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * USDHC0_AIPS2_SLOT))) #define USDHC1_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * USDHC1_AIPS2_SLOT))) +#define SNVS_BASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * SNVS_AIPS2_SLOT))) +#define SNVS_LP_LPCR (SNVS_BASE + 0x38) + #define RGPIO2P0_RBASE ((AIPS0_BASE + (AIPS0_SLOT_SIZE * RGPIO2P0_AIPS0_SLOT))) #define RGPIO2P1_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * RGPIO2P1_AIPS2_SLOT))) @@ -939,6 +943,9 @@ #define MMDC_MPWRDQBY3DL_WR_DQ25_DEL_MASK ((0x3f << MMDC_MPWRDQBY3DL_WR_DQ25_DEL)) #define MMDC_MPWRDQBY3DL_WR_DQ24_DEL_MASK ((0x3f << MMDC_MPWRDQBY3DL_WR_DQ24_DEL)) +#define SNVS_LPCR_DPEN (0x20) +#define SNVS_LPCR_SRTC_ENV (0x1) + #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 6015c11869..7119ee4a07 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -106,6 +106,10 @@ void s_init(void) /* clock configuration. */ clock_init(); + if (soc_rev() < CHIP_REV_2_0) { + /* enable dumb pmic */ + writel((readl(SNVS_LP_LPCR) | SNVS_LPCR_DPEN), SNVS_LP_LPCR); + } return; }