diff mbox series

[U-Boot,v2,36/50] x86: Support PCI VGA ROM when TPL is used

Message ID	20190426035922.20596-37-sjg@chromium.org
State	Accepted
Delegated to:	Bin Meng
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> From: Simon Glass <sjg@chromium.org> To: U-Boot Mailing List <u-boot@lists.denx.de> Date: Thu, 25 Apr 2019 21:59:08 -0600 Message-Id: <20190426035922.20596-37-sjg@chromium.org> In-Reply-To: <20190426035922.20596-1-sjg@chromium.org> References: <20190426035922.20596-1-sjg@chromium.org> MIME-Version: 1.0 Subject: [U-Boot] [PATCH v2 36/50] x86: Support PCI VGA ROM when TPL is used Precedence: list Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Series	x86: Add support for booting from TPL \| expand [U-Boot,v2,00/50] x86: Add support for booting from TPL [U-Boot,v2,01/50] binman: Don't generate an error in 'text' entry constructor [U-Boot,v2,02/50] binman: Don't show image-skip message by default [U-Boot,v2,03/50] binman: Add a missing comment in Entry_vblock [U-Boot,v2,04/50] dm: core: Fix translate condition in ofnode_get_addr_size() [U-Boot,v2,05/50] cros_ec: Use a hyphen in the uclass name [U-Boot,v2,06/50] spl: Allow sandbox to build a device-tree file [U-Boot,v2,07/50] binman: Allow sections to have an offset [U-Boot,v2,08/50] x86: start64: Fix copyright message [U-Boot,v2,09/50] x86: mp_init: Use proper error numbers [U-Boot,v2,10/50] x86: Add a way to reinit the cpu [U-Boot,v2,11/50] x86: dts: Add device-tree labels for rtc and reset [U-Boot,v2,12/50] x86: Update a stale comment about ifdtool [U-Boot,v2,13/50] x86: Support SPL and TPL [U-Boot,v2,14/50] x86: Support booting with TPL [U-Boot,v2,15/50] x86: Add a handoff header file [U-Boot,v2,16/50] x86: broadwell: Improve SDRAM debugging output [U-Boot,v2,17/50] x86: broadwell: Allow SDRAM init from SPL [U-Boot,v2,18/50] x86: Move init of debug UART to cpu.c [U-Boot,v2,19/50] x86: broadwell: Split CPU init [U-Boot,v2,20/50] x86: Add support for starting from SPL/TPL [U-Boot,v2,21/50] x86: Allow 16-bit init to be in TPL [U-Boot,v2,22/50] x86: broadwell: Allow booting from SPL [U-Boot,v2,23/50] x86: broadwell: Select refcode and CPU code for SPL [U-Boot,v2,24/50] x86: Add common Intel code for SPL [U-Boot,v2,25/50] x86: Support saving MRC data from SPL [U-Boot,v2,26/50] x86: Add a simple TPL implementation [U-Boot,v2,27/50] x86: mrccache: Add more debugging [U-Boot,v2,28/50] x86: sysreset: Separate out the EFI code [U-Boot,v2,29/50] x86: pch: Add an ioctl to read power-management info [U-Boot,v2,30/50] x86: ivybridge: Implement PCH_REQ_PMBASE_INFO [U-Boot,v2,31/50] x86: broadwell: Implement PCH_REQ_PMBASE_INFO [U-Boot,v2,32/50] x86: sysreset: Implement power-off if available [U-Boot,v2,33/50] x86: Support TPL in Intel common code [U-Boot,v2,34/50] x86: Don't set up MTRRs in SPL [U-Boot,v2,35/50] x86: Don't generate a bootstage report in SPL [U-Boot,v2,36/50] x86: Support PCI VGA ROM when TPL is used [U-Boot,v2,37/50] x86: sysreset: Implement the get_last() method [U-Boot,v2,38/50] x86: Add documention on the samus flashmap [U-Boot,v2,39/50] x86: samus: Update device tree for SPL [U-Boot,v2,40/50] x86: samus: Update device tree for verified boot [U-Boot,v2,41/50] x86: Update device tree for TPL [U-Boot,v2,42/50] x86: Update device tree for Chromium OS verified boot [U-Boot,v2,43/50] x86: Fix device-tree indentation [U-Boot,v2,44/50] x86: samus: Increase the pre-reloc memory again [U-Boot,v2,45/50] Revert "pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS" [U-Boot,v2,46/50] x86: Enable the RTC on all boards [U-Boot,v2,47/50] x86: Update the memory map a little [U-Boot,v2,48/50] x86: broadwell: Update PCH to work in TPL [U-Boot,v2,49/50] x86: Add a way to jump from TPL to SPL [U-Boot,v2,50/50] x86: samus: Add a target to boot through TPL

Commit Message

Simon Glass April 26, 2019, 3:59 a.m. UTC

When TPL is in use, U-Boot proper should support initing the VGA ROM even
though the 32-bit init portion is in SPL. Update the condition to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v2: None

 drivers/pci/pci_rom.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Bin Meng May 1, 2019, 3:44 p.m. UTC | #1

On Fri, Apr 26, 2019 at 12:00 PM Simon Glass <sjg@chromium.org> wrote:
>
> When TPL is in use, U-Boot proper should support initing the VGA ROM even
> though the 32-bit init portion is in SPL. Update the condition to handle
> this.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v2: None
>
>  drivers/pci/pci_rom.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

applied to u-boot-x86, thanks!

diff mbox series

Patch

diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 7d9b75c2c45..2cede1211bb 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -306,7 +306,7 @@  int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
 			goto err;
 #endif
 	} else {
-#if defined(CONFIG_X86) && CONFIG_IS_ENABLED(X86_32BIT_INIT)
+#if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
 		bios_set_interrupt_handler(0x15, int15_handler);
 
 		bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,