From patchwork Fri Apr 26 03:58:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1091234 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="YGYElTDa"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44r16h5Mksz9s3l for ; Fri, 26 Apr 2019 14:19:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5F381C21E45; Fri, 26 Apr 2019 04:03:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4186EC21E45; Fri, 26 Apr 2019 04:00:33 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 560CCC21DFA; Fri, 26 Apr 2019 04:00:13 +0000 (UTC) Received: from mail-it1-f193.google.com (mail-it1-f193.google.com [209.85.166.193]) by lists.denx.de (Postfix) with ESMTPS id A7A25C21E70 for ; Fri, 26 Apr 2019 04:00:09 +0000 (UTC) Received: by mail-it1-f193.google.com with SMTP id z4so3733523itc.3 for ; Thu, 25 Apr 2019 21:00:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mzcgvp1uu7hsxAUD6mu4HcTGZ0z2edsVBbb42I806cc=; b=YGYElTDapfYhpIjhwxhNqi2NpoRvah6ftwH5Kaejp6O1IrI8xP6ZirbG92uqzIa9Ad jSfUa1mFCkTYNoNuhoOkzZJQskFz2pHOH5Ywk3QfC+RA3fvYWCexaNM3Hi2FovMW0bzM zYzY2y8ckjJGLJM5FYOupSgXoWbovyQUVhzKI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mzcgvp1uu7hsxAUD6mu4HcTGZ0z2edsVBbb42I806cc=; b=Bj6l3RVOK0A4ooNvPJzWxqWJBt6cfuqrh0tr0yoO8OnWoDDtuyXLHRkxZtj+r0Mvss 4sqpbpTrdcnEaRcRUNWAVjO2S048GL2skSMuJqsGtWPZoep/YLziNw3V3ljcO43nW0bs Fd7B0O0UE2mSNUosf5KG2ZIThIyITc4PNXerh1e8LzB4bah/SIf7ppI2Lztx/bRWpy93 fCpmIj6MrkEqYLSgZM9h8T3ftah8JkBenoSTQN5RXLOE9m/l5QkqMhgzUa9vkNJBSynq PZo7Nr2A4M/RvvSKS1Oz6kOjpxppstgzwY+9dscYmYH9CSRYfSKUgsqi7nLTQqrdGzhI eHAQ== X-Gm-Message-State: APjAAAXdUHXhH8JsCrqbqR8qc8MIb3D/xgbgSUC1JkFKRTpj6cwyccKG M/Z5QQPWuKmn3ohtfylYfSLc7Ccdi8Y= X-Google-Smtp-Source: APXvYqzt5nEUcPJugteb3+3X8A5b0+OLLuB2SnnNQ68tBltsfrR6uou/n1szu+WPC2G35b5Zt4ywrQ== X-Received: by 2002:a02:b895:: with SMTP id p21mr30795430jam.80.1556251208523; Thu, 25 Apr 2019 21:00:08 -0700 (PDT) Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) by smtp.gmail.com with ESMTPSA id m142sm5006180itb.31.2019.04.25.21.00.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Apr 2019 21:00:08 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Date: Thu, 25 Apr 2019 21:58:50 -0600 Message-Id: <20190426035922.20596-19-sjg@chromium.org> X-Mailer: git-send-email 2.21.0.593.g511ec345e18-goog In-Reply-To: <20190426035922.20596-1-sjg@chromium.org> References: <20190426035922.20596-1-sjg@chromium.org> MIME-Version: 1.0 Subject: [U-Boot] [PATCH v2 18/50] x86: Move init of debug UART to cpu.c X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" At present the debug UART is set up in sdram.c which is not the best place since it has nothing in particular to do with SDRAM. Since we want to support initing this in SPL too, move it to a common file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v2: None arch/x86/cpu/broadwell/cpu.c | 13 +++++++++++++ arch/x86/cpu/broadwell/sdram.c | 11 ----------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 232fa40eb53..d53c7b863fb 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -12,7 +12,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -156,6 +158,17 @@ int print_cpuinfo(void) return 0; } +void board_debug_uart_init(void) +{ + struct udevice *bus = NULL; + + /* com1 / com2 decode range */ + pci_x86_write_config(bus, PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16); + + pci_x86_write_config(bus, PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, + PCI_SIZE_16); +} + /* * The core 100MHz BLCK is disabled in deeper c-states. One needs to calibrate * the 100MHz BCLCK against the 24MHz BLCK to restore the clocks properly diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c index b8450cc9d29..b31d78c092a 100644 --- a/arch/x86/cpu/broadwell/sdram.c +++ b/arch/x86/cpu/broadwell/sdram.c @@ -194,17 +194,6 @@ int misc_init_r(void) return 0; } -void board_debug_uart_init(void) -{ - struct udevice *bus = NULL; - - /* com1 / com2 decode range */ - pci_x86_write_config(bus, PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16); - - pci_x86_write_config(bus, PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, - PCI_SIZE_16); -} - static const struct udevice_id broadwell_syscon_ids[] = { { .compatible = "intel,me", .data = X86_SYSCON_ME }, { }