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[46.91.230.29]) by smtp.gmail.com with ESMTPSA id y125sm26623670wmc.39.2019.04.15.02.32.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 15 Apr 2019 02:32:51 -0700 (PDT) From: Thierry Reding To: Tom Warren , Simon Glass Date: Mon, 15 Apr 2019 11:32:20 +0200 Message-Id: <20190415093239.27509-9-thierry.reding@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190415093239.27509-1-thierry.reding@gmail.com> References: <20190415093239.27509-1-thierry.reding@gmail.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, Jon Hunter Subject: [U-Boot] [PATCH v5 08/27] ARM: tegra: Guard memory controller code with a Kconfig symbol X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Thierry Reding Memory controller code is not relevant on all Tegra SoC generations, so guard it with a Kconfig symbol that can be selected by the generations that need it. This is in preparation for unifying Tegra186 code with the code used on older generations. Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/Kconfig | 5 +++++ arch/arm/mach-tegra/board.c | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 265051b18aaf..5763c4ae3cd1 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -26,6 +26,9 @@ config TEGRA_IVC U-Boot, it is typically used for communication between the main CPU and various auxiliary processors. +config TEGRA_MC + bool + config TEGRA_COMMON bool "Tegra common options" select BINMAN @@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON select TEGRA_COMMON select TEGRA_GPIO select TEGRA_GP_PADCTRL + select TEGRA_MC select TEGRA_NO_BPMP config TEGRA_ARMV8_COMMON @@ -111,6 +115,7 @@ config TEGRA210 select TEGRA_CLKRST select TEGRA_GPIO select TEGRA_GP_PADCTRL + select TEGRA_MC select TEGRA_NO_BPMP config TEGRA186 diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index ecd5001de4c5..7ef5a67edd1f 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -13,7 +13,9 @@ #include #endif #include +#if IS_ENABLED(CONFIG_TEGRA_MC) #include +#endif #include #include #include @@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void) } #endif +#if IS_ENABLED(CONFIG_TEGRA_MC) /* Read the RAM size directly from the memory controller */ static phys_size_t query_sdram_size(void) { @@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void) return size_bytes; } +#endif int dram_init(void) { +#if IS_ENABLED(CONFIG_TEGRA_MC) /* We do not initialise DRAM here. We just query the size */ gd->ram_size = query_sdram_size(); +#endif + return 0; }