From patchwork Tue Apr 9 15:25:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 1082409 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ziswiler.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44drvq3Wfpz9sRd for ; Wed, 10 Apr 2019 01:35:19 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 2EEB4C21DEC; Tue, 9 Apr 2019 15:34:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=SPF_HELO_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id F3BBAC21E13; Tue, 9 Apr 2019 15:30:32 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B991EC21E29; Tue, 9 Apr 2019 15:25:59 +0000 (UTC) Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lists.denx.de (Postfix) with ESMTPS id 2321DC21E70 for ; Tue, 9 Apr 2019 15:25:56 +0000 (UTC) Received: from marcel-nb-toradex-int.toradex.int ([46.140.72.82]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Lb3fT-1gTmEN0Vg1-00kcXF; Tue, 09 Apr 2019 17:25:46 +0200 From: Marcel Ziswiler To: u-boot@lists.denx.de Date: Tue, 9 Apr 2019 17:25:31 +0200 Message-Id: <20190409152534.11691-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190409152534.11691-1-marcel@ziswiler.com> References: <20190409152534.11691-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:iAzGPQVEHrIj7ZOgtsmxCAP1w6Lmj2OGWErabs081Tw5xy+5QCd LLcengGN+VpcgjAmOzyDZoc93yw8I7gbXG2dkO0AGRresHoBIgx4twoPT1M7ebh8FXQqVKG Kp3Ir9u3QWrG2R3uFCIUOkEO6MAYKthgxzJ76NlvjAmG9pjclVZT5Lwx62zAZyp7ZvemmJZ PuiYSNfJBQkgH5+VkLgyg== X-UI-Out-Filterresults: notjunk:1; V03:K0:AHSjVngLjxc=:2NlRiW6rJX9VwpU5FL5Pa5 kbdLkgEZSDKzCl2hjOuh4Wiipy24QhqNXvvBnPg4b0kLtaftho67BFnWugmqRziJftRKFbsFF Bygr7qfg160DOUPfjqRbNGeJSbhBwiKl2h5S7Hq1eiNPbQRJaxK1/EbU8FjQIAm0rXXk8+YSX G/eum+wst2bTORO0Zwt60So6fMI2iaQIGDlxK4KJYP89S5fv8qUiwBPlcbXnKDM+QLGNbUt9m dqd3P5DNZk1KmEGM4MN5TnLDZw4CNZNyGi9Svkd8DfG+regZHxOzgWTFLIk4Z1H7oS20BZ6MN kbPBPzYTqx3MaBJurmAP19ike/0waorDvJu7gh7Tb+eZItTRopmkOk1SaRJXh1ZlUqICVHHKv 1dpO/PWiATltVwtF3fXaIT/2I5lN8iTKjHnEAbZBACym08MIGy1ZZXwZ6DByoMpqDSvsOjFQC eBTIrlmeSGRnpEZfTSEyMBdyhaFBDBkXYVASRPQ5gEiOJUYeWPnEol42nqqFc1/2sk4QIxyZ+ mXGCLkprDsT6fBdquEtL27Mcbi5zI5gQW/uNldT4mswDrVI9WMpEyor5N+e+xm5n12Ol3Ptsz jm2PRuLPlYidoqaeVy3qeZAEAEGndWNOxrVtfQbL4JNy170SGaC6PLCwMZcSU36bgj1n4DiP4 wFc4irfuFn/CD1ep1M/9wkpRRg+IwsGJyxDDZFf0GolH5AthJCZVgCqXTz4KT3HNF+K9RkM9p aoPjvo7d4D+BtZPSvrkVTlnhEZigHgnAEXjoxQ== Cc: Tom Rini , Marcel Ziswiler , Igor Opaniuk , Fabio Estevam Subject: [U-Boot] [PATCH v2 2/5] arm: dts: imx8dx: add lpuart1, lpuart2, lpuart3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Marcel Ziswiler Add support for lpuart1, lpuart2 and lpuart3. Signed-off-by: Marcel Ziswiler Reviewed-by: Peng Fan Reviewed-by: Igor Opaniuk --- Changes in v2: - Added Peng and Igor's reviewed-by. arch/arm/dts/fsl-imx8dx.dtsi | 54 ++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm/dts/fsl-imx8dx.dtsi b/arch/arm/dts/fsl-imx8dx.dtsi index 3b1a2a20e3..715abb413d 100644 --- a/arch/arm/dts/fsl-imx8dx.dtsi +++ b/arch/arm/dts/fsl-imx8dx.dtsi @@ -236,6 +236,21 @@ power-domains = <&pd_dma>; wakeup-irq = <225>; }; + pd_dma_lpuart1: PD_DMA_UART1 { + reg = ; + #power-domain-cells = <0>; + power-domains = <&pd_dma>; + }; + pd_dma_lpuart2: PD_DMA_UART2 { + reg = ; + #power-domain-cells = <0>; + power-domains = <&pd_dma>; + }; + pd_dma_lpuart3: PD_DMA_UART3 { + reg = ; + #power-domain-cells = <0>; + power-domains = <&pd_dma>; + }; }; }; @@ -402,6 +417,45 @@ status = "disabled"; }; + lpuart1: serial@5a070000 { + compatible = "fsl,imx8qm-lpuart"; + reg = <0x0 0x5a070000 0x0 0x1000>; + interrupts = ; + clocks = <&clk IMX8QXP_UART1_CLK>, + <&clk IMX8QXP_UART1_IPG_CLK>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX8QXP_UART1_CLK>; + assigned-clock-rates = <80000000>; + power-domains = <&pd_dma_lpuart1>; + status = "disabled"; + }; + + lpuart2: serial@5a080000 { + compatible = "fsl,imx8qm-lpuart"; + reg = <0x0 0x5a080000 0x0 0x1000>; + interrupts = ; + clocks = <&clk IMX8QXP_UART2_CLK>, + <&clk IMX8QXP_UART2_IPG_CLK>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX8QXP_UART2_CLK>; + assigned-clock-rates = <80000000>; + power-domains = <&pd_dma_lpuart2>; + status = "disabled"; + }; + + lpuart3: serial@5a090000 { + compatible = "fsl,imx8qm-lpuart"; + reg = <0x0 0x5a090000 0x0 0x1000>; + interrupts = ; + clocks = <&clk IMX8QXP_UART3_CLK>, + <&clk IMX8QXP_UART3_IPG_CLK>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX8QXP_UART3_CLK>; + assigned-clock-rates = <80000000>; + power-domains = <&pd_dma_lpuart3>; + status = "disabled"; + }; + usdhc1: usdhc@5b010000 { compatible = "fsl,imx8qm-usdhc", "fsl,imx6sl-usdhc"; interrupt-parent = <&gic>;