From patchwork Mon Mar 25 02:24:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1063650 X-Patchwork-Delegate: prabhakar@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="KjRCacoj"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44SJ7M6lD7z9sNg for ; Mon, 25 Mar 2019 13:27:11 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 904DAC21E8A; Mon, 25 Mar 2019 02:25:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7110AC21EC2; Mon, 25 Mar 2019 02:24:52 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 78E97C21EE8; Mon, 25 Mar 2019 02:24:27 +0000 (UTC) Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-eopbgr150074.outbound.protection.outlook.com [40.107.15.74]) by lists.denx.de (Postfix) with ESMTPS id 78AF8C21EF2 for ; Mon, 25 Mar 2019 02:24:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=22hlGpfwEsVJ7J2KbuGD5DTh9GLhj0c2SVUQ6brwJ68=; b=KjRCacojCBxPGFg6dw/zWr1Gl+rxemNILvUN9OsNQhnI07ytLnyLRU70ca7xuG4OeiEydxkEIG3mVeQyHIw16ZHUZUCBBL4R9tnpB3R9qabVx9NzHpa+DJoG813bhfr2FFgoLIw3xy7+wqe2F6zd9Z5nzmn7DhwrwTuNCsZqNAY= Received: from AM6PR04MB5781.eurprd04.prod.outlook.com (20.179.3.19) by AM6PR04MB5638.eurprd04.prod.outlook.com (20.179.1.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1730.15; Mon, 25 Mar 2019 02:24:21 +0000 Received: from AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::30cc:e034:1f7a:2cc7]) by AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::30cc:e034:1f7a:2cc7%2]) with mapi id 15.20.1730.019; Mon, 25 Mar 2019 02:24:21 +0000 From: "Z.q. Hou" To: "u-boot@lists.denx.de" , "albert.u.boot@aribaud.net" , Priyanka Jain , York Sun , "sriram.dash@nxp.com" , "yamada.masahiro@socionext.com" , Prabhakar Kushwaha , Mingkai Hu , "M.h. Lian" , "bmeng.cn@gmail.com" Thread-Topic: [RESEND PATCHv4 2/9] armv8: lx2160a: add MMU table entries for PCIe Thread-Index: AQHU4rHbHz4/r4kZmUeRvMfRHsKY0Q== Date: Mon, 25 Mar 2019 02:24:21 +0000 Message-ID: <20190325022546.38427-3-Zhiqiang.Hou@nxp.com> References: <20190325022546.38427-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20190325022546.38427-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK2PR06CA0005.apcprd06.prod.outlook.com (2603:1096:202:2e::17) To AM6PR04MB5781.eurprd04.prod.outlook.com (2603:10a6:20b:ad::19) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 038269ba-37b7-4500-94ab-08d6b0c8fd68 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(5600127)(711020)(4605104)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020); SRVR:AM6PR04MB5638; x-ms-traffictypediagnostic: AM6PR04MB5638: x-microsoft-antispam-prvs: x-forefront-prvs: 0987ACA2E2 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(346002)(376002)(366004)(39860400002)(396003)(136003)(189003)(199004)(186003)(105586002)(4326008)(7736002)(99286004)(305945005)(2906002)(256004)(5660300002)(14444005)(478600001)(106356001)(8936002)(50226002)(486006)(102836004)(2616005)(26005)(446003)(53936002)(11346002)(25786009)(2501003)(476003)(14454004)(6116002)(52116002)(3846002)(8676002)(76176011)(71200400001)(6506007)(81166006)(386003)(6486002)(81156014)(68736007)(1076003)(6512007)(71190400001)(86362001)(97736004)(2201001)(316002)(66066001)(110136005)(6436002)(36756003)(921003)(1121003); DIR:OUT; SFP:1101; SCL:1; SRVR:AM6PR04MB5638; H:AM6PR04MB5781.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: ZPF3gf/ncfHqLkglCyh+6R2za/Mlr3NpSkEyq6h4VdA5LRXikhfhDh/KnKSB202K3Z61yVbHmPTy6HPWJd3CDGchdgIGxyINk/U4N46Qu2Zw90COiEGTeCOoFFcm/kMe+RbLpQsdeogHpQ4oFEqKc0rTJed8NuPyh78GpBeVhSzbRwuZPhrpT3p0XqDEj6tAA3Adzy4ijJKbGy9UPlS/1PqpIrLTVWG+QYJcRcjPuD6ktYdWFfN/AO03d1SuXxmubiYBF5DHBCWSLKFMtRyGnAe5S2iDsNduzb0kPvdvSBT/2Tx33Ghvw+I72YzF8F5jcxh6U9vxdVV3Gl/bySFofMFtwfOaO2Hskbo3+iTTSHrylaEDI630MFVglubVx6OCBO4vNGvDVsUp8FOeDaOyOVie7BkJb2kin6Wa5Rm4bwU= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 038269ba-37b7-4500-94ab-08d6b0c8fd68 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Mar 2019 02:24:21.3453 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB5638 Cc: "Z.q. Hou" Subject: [U-Boot] [RESEND PATCHv4 2/9] armv8: lx2160a: add MMU table entries for PCIe X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Hou Zhiqiang The lx2160a have up to 6 PCIe controllers and have different address and size of PCIe region. Signed-off-by: Hou Zhiqiang --- V4: - No change arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 12 ++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 ++ .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 14 +++++++++++++- 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 978d46b32f..2805e5f6f2 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -257,6 +257,18 @@ static struct mm_region final_map[] = { PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, +#endif +#ifdef CONFIG_ARCH_LX2160A + { SYS_PCIE5_PHYS_ADDR, SYS_PCIE5_PHYS_ADDR, + SYS_PCIE5_PHYS_SIZE, + PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, + { SYS_PCIE6_PHYS_ADDR, SYS_PCIE6_PHYS_ADDR, + SYS_PCIE6_PHYS_SIZE, + PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, #endif { CONFIG_SYS_FSL_WRIOP1_BASE, CONFIG_SYS_FSL_WRIOP1_BASE, CONFIG_SYS_FSL_WRIOP1_SIZE, diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index 89124cdb0e..bdeb62576c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -44,6 +44,8 @@ #define CONFIG_SYS_PCIE2_PHYS_SIZE 0x800000000 #define CONFIG_SYS_PCIE3_PHYS_SIZE 0x800000000 #define CONFIG_SYS_PCIE4_PHYS_SIZE 0x800000000 +#define SYS_PCIE5_PHYS_SIZE 0x800000000 +#define SYS_PCIE6_PHYS_SIZE 0x800000000 #endif #define CONFIG_SYS_FSL_WRIOP1_BASE 0x4300000000 #define CONFIG_SYS_FSL_WRIOP1_SIZE 0x100000000 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 9fab88ab2f..c9aa0cad71 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -167,7 +167,19 @@ #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) #define CONFIG_SYS_PCIE4_ADDR (CONFIG_SYS_IMMR + 0x2700000) -#ifdef CONFIG_ARCH_LS1088A +#ifdef CONFIG_ARCH_LX2160A +#define SYS_PCIE5_ADDR (CONFIG_SYS_IMMR + 0x2800000) +#define SYS_PCIE6_ADDR (CONFIG_SYS_IMMR + 0x2900000) +#endif + +#ifdef CONFIG_ARCH_LX2160A +#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x8000000000ULL +#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x8800000000ULL +#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x9000000000ULL +#define CONFIG_SYS_PCIE4_PHYS_ADDR 0x9800000000ULL +#define SYS_PCIE5_PHYS_ADDR 0xa000000000ULL +#define SYS_PCIE6_PHYS_ADDR 0xa800000000ULL +#elif CONFIG_ARCH_LS1088A #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x2000000000ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x2800000000ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x3000000000ULL