From patchwork Tue Mar 12 14:41:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 1055446 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="pjngK42f"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44Jd5C1wn5z9s3l for ; Wed, 13 Mar 2019 01:43:43 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E68A1C21F4F; Tue, 12 Mar 2019 14:42:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 23794C21F52; Tue, 12 Mar 2019 14:41:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id DC486C21F67; Tue, 12 Mar 2019 14:41:30 +0000 (UTC) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by lists.denx.de (Postfix) with ESMTPS id 69AD4C21F63 for ; Tue, 12 Mar 2019 14:41:26 +0000 (UTC) Received: from localhost.localdomain (cpe-70-114-128-244.austin.res.rr.com [70.114.128.244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B1CBE21734; Tue, 12 Mar 2019 14:41:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1552401685; bh=XhtATY6ndMR2zsqIllxfmiSqhwzUMrf4XTzR7B1JKPM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pjngK42fLbS9sLFjcSGKz7XUXCZireZqltPXGJ1yOfUDvp4AqSnKPx3Ij3MljpZMl f36E0w37m3wTzckRbggeG12WTF1Sy+GTCMRM3Sm4NtDX96ERknj2AbtIMphE9xXJGv kjBh1vOqNmGxZNIpIi13BDPUvpZQgbQiRTGyNZpI= From: Dinh Nguyen To: u-boot@lists.denx.de Date: Tue, 12 Mar 2019 09:41:09 -0500 Message-Id: <20190312144110.18841-6-dinguyen@kernel.org> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190312144110.18841-1-dinguyen@kernel.org> References: <20190312144110.18841-1-dinguyen@kernel.org> MIME-Version: 1.0 Cc: marex@denx.de Subject: [U-Boot] [PATCHv2 5/6] ARM: socfpga: use the pl310 driver to configure the cache X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Find the UCLASS_CACHE driver to configure the cache controller's settings. Reviewed-by: Marek Vasut Signed-off-by: Dinh Nguyen Reviewed-by: Simon Glass --- arch/arm/mach-socfpga/misc.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index ec8339e045..34d8c4c51b 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -59,20 +59,10 @@ void enable_caches(void) #ifdef CONFIG_SYS_L2_PL310 void v7_outer_cache_enable(void) { - /* Disable the L2 cache */ - clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); - - writel(0x0, &pl310->pl310_tag_latency_ctrl); - writel(0x10, &pl310->pl310_data_latency_ctrl); - - /* enable BRESP, instruction and data prefetch, full line of zeroes */ - setbits_le32(&pl310->pl310_aux_ctrl, - L310_AUX_CTRL_DATA_PREFETCH_MASK | - L310_AUX_CTRL_INST_PREFETCH_MASK | - L310_SHARED_ATT_OVERRIDE_ENABLE); + struct udevice *dev; - /* Enable the L2 cache */ - setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); + if (uclass_get_device(UCLASS_CACHE, 0, &dev)) + pr_err("cache controller driver NOT found!\n"); } void v7_outer_cache_disable(void)