diff mbox series

[U-Boot,22/40] x86: broadwell: Allow booting from SPL

Message ID 20190130035935.235565-23-sjg@chromium.org
State Superseded
Delegated to: Bin Meng
Headers show
Series x86: Add support for booting from TPL | expand

Commit Message

Simon Glass Jan. 30, 2019, 3:59 a.m. UTC
At present broadwell only supports booting straight into U-Boot proper.
Add a separate init file to boot from SPL into U-Boot proper, and select
it when SPL is in use.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 arch/x86/cpu/broadwell/Makefile       | 15 +++++++
 arch/x86/cpu/broadwell/cpu_from_spl.c | 63 +++++++++++++++++++++++++++
 2 files changed, 78 insertions(+)
 create mode 100644 arch/x86/cpu/broadwell/cpu_from_spl.c

Comments

Bin Meng Feb. 22, 2019, 7:19 a.m. UTC | #1
On Wed, Jan 30, 2019 at 12:00 PM Simon Glass <sjg@chromium.org> wrote:
>
> At present broadwell only supports booting straight into U-Boot proper.
> Add a separate init file to boot from SPL into U-Boot proper, and select
> it when SPL is in use.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  arch/x86/cpu/broadwell/Makefile       | 15 +++++++
>  arch/x86/cpu/broadwell/cpu_from_spl.c | 63 +++++++++++++++++++++++++++
>  2 files changed, 78 insertions(+)
>  create mode 100644 arch/x86/cpu/broadwell/cpu_from_spl.c
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff mbox series

Patch

diff --git a/arch/x86/cpu/broadwell/Makefile b/arch/x86/cpu/broadwell/Makefile
index 303d2b274b..11d30b03e5 100644
--- a/arch/x86/cpu/broadwell/Makefile
+++ b/arch/x86/cpu/broadwell/Makefile
@@ -4,6 +4,21 @@ 
 
 obj-y += cpu.o
 obj-y += cpu_full.o
+
+ifdef CONFIG_SPL
+ifndef CONFIG_SPL_BUILD
+obj-y += cpu_from_spl.o
+obj-y += cpu_full.o
+endif
+ifndef CONFIG_SPL_BUILD
+# obj-y += cpu_from_spl.o
+endif
+endif
+
+ifeq ($(CONFIG_$(SPL_TPL_)X86_32BIT_INIT),)
+#obj-y += cpu_from_spl.o
+endif
+
 obj-y += iobp.o
 obj-y += lpc.o
 obj-y += me.o
diff --git a/arch/x86/cpu/broadwell/cpu_from_spl.c b/arch/x86/cpu/broadwell/cpu_from_spl.c
new file mode 100644
index 0000000000..c3d4a8d547
--- /dev/null
+++ b/arch/x86/cpu/broadwell/cpu_from_spl.c
@@ -0,0 +1,63 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <common.h>
+#include <bloblist.h>
+#include <debug_uart.h>
+#include <handoff.h>
+#include <asm/mtrr.h>
+
+int misc_init_r(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	struct spl_handoff *ho;
+
+	ho = bloblist_find(BLOBLISTT_SPL_HANDOFF, sizeof(*ho));
+	if (!ho)
+		return log_msg_ret("Missing SPL hand-off info", -ENOENT);
+	handoff_load_dram_size(ho);
+#ifdef CONFIG_TPL
+	/* TODO(sjg@chromium.org): MTRR cannot be adjusted without a hang */
+	mtrr_add_request(MTRR_TYPE_WRBACK, 0, 2ULL << 30);
+#else
+	mtrr_add_request(MTRR_TYPE_WRBACK, 0, gd->ram_size);
+	mtrr_commit(true);
+#endif
+
+	return 0;
+}
+
+int checkcpu(void)
+{
+	return 0;
+}
+
+int print_cpuinfo(void)
+{
+	return 0;
+}
+
+void board_debug_uart_init(void)
+{
+}
+
+int dram_init_banksize(void)
+{
+#ifdef CONFIG_NR_DRAM_BANKS
+	struct spl_handoff *ho;
+
+	ho = bloblist_find(BLOBLISTT_SPL_HANDOFF, sizeof(*ho));
+	if (!ho)
+		return log_msg_ret("Missing SPL hand-off info", -ENOENT);
+	handoff_load_dram_banks(ho);
+#endif
+
+	return 0;
+}