From patchwork Mon Jan 14 14:17:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1024591 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43dbQC04rPz9s4s for ; Tue, 15 Jan 2019 01:26:58 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id AD822C21F0C; Mon, 14 Jan 2019 14:19:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7EF55C21F01; Mon, 14 Jan 2019 14:18:40 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0EEE3C21F34; Mon, 14 Jan 2019 14:18:13 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id 6F703C21EF7 for ; Mon, 14 Jan 2019 14:18:10 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 43dbD21yjNz1qvgx; Mon, 14 Jan 2019 15:18:10 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 43dbD20Qjkz1qsms; Mon, 14 Jan 2019 15:18:10 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id 0XQ4PWcNnFr3; Mon, 14 Jan 2019 15:18:08 +0100 (CET) X-Auth-Info: WU1kaDdHfeISoEfDBSaRHWhpRpvw+3J+DqMyOOrMw9Y= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Mon, 14 Jan 2019 15:18:08 +0100 (CET) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam , Stefan Agner Date: Mon, 14 Jan 2019 15:17:24 +0100 Message-Id: <20190114141740.20429-6-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190114141740.20429-1-lukma@denx.de> References: <20190114141740.20429-1-lukma@denx.de> Cc: "Albert ARIBAUD \(3ADEV\)" , "NXP i.MX U-Boot Team" Subject: [U-Boot] [PATCH v1 05/21] vybrid: clock: Provide enable_i2c_clk() function for Vybrid X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Provide function to enable I2C2 clock for vf610 (BK4) - in the generic code. Signed-off-by: Lukasz Majewski --- arch/arm/cpu/armv7/vf610/generic.c | 19 +++++++++++++++++++ arch/arm/include/asm/arch-vf610/clock.h | 3 +++ board/phytec/pcm052/pcm052.c | 2 +- 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index cbd3391918..f1e6c7816e 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -375,3 +375,22 @@ void enable_caches(void) mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option); } #endif + +#ifdef CONFIG_SYS_I2C_MXC +/* i2c_num can be from 0 - 3 */ +int enable_i2c_clk(unsigned char enable, unsigned int i2c_num) +{ + struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR; + + switch (i2c_num) { + case 2: + clrsetbits_le32(&ccm->ccgr10, CCM_CCGR10_I2C2_CTRL_MASK, + CCM_CCGR10_I2C2_CTRL_MASK); + break; + default: + return -EINVAL; + } + + return 0; +} +#endif diff --git a/arch/arm/include/asm/arch-vf610/clock.h b/arch/arm/include/asm/arch-vf610/clock.h index 3bd73a01f3..72184fd608 100644 --- a/arch/arm/include/asm/arch-vf610/clock.h +++ b/arch/arm/include/asm/arch-vf610/clock.h @@ -22,6 +22,9 @@ enum mxc_clock { void enable_ocotp_clk(unsigned char enable); unsigned int mxc_get_clock(enum mxc_clock clk); u32 get_lpuart_clk(void); +#ifdef CONFIG_SYS_I2C_MXC +int enable_i2c_clk(unsigned char enable, unsigned int i2c_num); +#endif #define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index f988af2abc..cfc8009102 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -485,7 +485,7 @@ static void clock_init(void) clrsetbits_le32(&ccm->ccgr9, CCM_REG_CTRL_MASK, CCM_CCGR9_FEC0_CTRL_MASK | CCM_CCGR9_FEC1_CTRL_MASK); clrsetbits_le32(&ccm->ccgr10, CCM_REG_CTRL_MASK, - CCM_CCGR10_NFC_CTRL_MASK | CCM_CCGR10_I2C2_CTRL_MASK); + CCM_CCGR10_NFC_CTRL_MASK); clrsetbits_le32(&anadig->pll2_ctrl, ANADIG_PLL2_CTRL_POWERDOWN, ANADIG_PLL2_CTRL_ENABLE | ANADIG_PLL2_CTRL_DIV_SELECT);