From patchwork Wed Dec 5 17:10:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 1008352 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 4394yF4Rxqz9s9G for ; Thu, 6 Dec 2018 04:11:13 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id BFF15C22661; Wed, 5 Dec 2018 17:11:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id CCAA2C21F82; Wed, 5 Dec 2018 17:11:05 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id DF569C2262C; Wed, 5 Dec 2018 17:11:03 +0000 (UTC) Received: from mail.bootlin.com (mail.bootlin.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id 551B6C21F52 for ; Wed, 5 Dec 2018 17:11:03 +0000 (UTC) Received: by mail.bootlin.com (Postfix, from userid 110) id 7D25420A35; Wed, 5 Dec 2018 18:11:02 +0100 (CET) Received: from localhost (242.171.71.37.rev.sfr.net [37.71.171.242]) by mail.bootlin.com (Postfix) with ESMTPSA id 562D320729; Wed, 5 Dec 2018 18:11:02 +0100 (CET) From: Gregory CLEMENT To: Daniel Schwierzeck Date: Wed, 5 Dec 2018 18:10:48 +0100 Message-Id: <20181205171054.926-2-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181205171054.926-1-gregory.clement@bootlin.com> References: <20181205171054.926-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Cc: Antoine Tenart , Steen.Hegelund@microchip.com, u-boot@lists.denx.de, Allan Nielsen , Thomas Petazzoni , =?utf-8?b?TWlxdcOo?= =?utf-8?q?l_Raynal?= Subject: [U-Boot] [PATCH v3 1/7] MIPS: move create_tlb() in an proper header: mipsregs.h X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Export create_tlb() as an inline function in mipsregs.h. It allows to remove the declaration of the function from the board files. Then it will allow also to use this function very early in the boot when the stack is not usable. Signed-off-by: Gregory CLEMENT --- arch/mips/cpu/cpu.c | 10 ---------- arch/mips/include/asm/mipsregs.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c index 5c56ab0289..a403ff729b 100644 --- a/arch/mips/cpu/cpu.c +++ b/arch/mips/cpu/cpu.c @@ -28,16 +28,6 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } #endif -void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) -{ - write_c0_entrylo0(low0); - write_c0_pagemask(pagemask); - write_c0_entrylo1(low1); - write_c0_entryhi(hi); - write_c0_index(index); - tlb_write_indexed(); -} - int arch_cpu_init(void) { mips_cache_probe(); diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 48fa1f1f7f..930562ebb2 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -2005,6 +2005,17 @@ static inline unsigned int get_ebase_cpunum(void) return read_c0_ebase() & 0x3ff; } +static inline void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, + u32 low1) +{ + write_c0_entrylo0(low0); + write_c0_pagemask(pagemask); + write_c0_entrylo1(low1); + write_c0_entryhi(hi); + write_c0_index(index); + tlb_write_indexed(); +} + #endif /* !__ASSEMBLY__ */ #endif /* _ASM_MIPSREGS_H */