@@ -286,6 +286,7 @@ source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig"
source "arch/powerpc/cpu/mpc83xx/bats/Kconfig"
source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"
source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig"
+source "arch/powerpc/cpu/mpc83xx/hid/Kconfig"
menu "Legacy options"
new file mode 100644
@@ -0,0 +1,565 @@
+menu "HID setup"
+
+menu "HID0 initial"
+
+config HID0_INIT_EMCP
+ bool "Enable machine check int on mcp"
+
+config HID0_INIT_ECPE
+ bool "Enable cache parity errors"
+
+config HID0_INIT_EBA
+ bool "Enable address parity checking"
+
+config HID0_INIT_EBD
+ bool "Enable data parity checking"
+
+choice
+ prompt "HID0 clock configuration"
+
+config HID0_INIT_CLKOUT_OFF
+ bool "Clock output off"
+
+config HID0_INIT_CLKOUT_CORE_HALF
+ bool "Core clock / 2"
+
+config HID0_INIT_CLKOUT_CORE
+ bool "Core clock"
+
+config HID0_INIT_CLKOUT_BUS
+ bool "Bus clock"
+
+endchoice
+
+config HID0_INIT_PAR
+ bool "Disable precharge of artry_out"
+
+config HID0_INIT_DOZE
+ bool "Enable doze mode"
+
+config HID0_INIT_NAP
+ bool "Enable nap mode"
+
+config HID0_INIT_SLEEP
+ bool "Enable sleep mode"
+
+config HID0_INIT_DPM
+ bool "Enable dynamic power management"
+
+config HID0_INIT_ICE
+ bool "Enable instruction cache"
+
+config HID0_INIT_DCE
+ bool "Enable data cache"
+
+config HID0_INIT_ILOCK
+ bool "Lock instruction cache"
+
+config HID0_INIT_DLOCK
+ bool "Lock data cache"
+
+config HID0_INIT_ICFI
+ bool "Flash invalidate instruction cache"
+
+config HID0_INIT_DCFI
+ bool "Flash invalidate data cache"
+
+config HID0_INIT_IFEM
+ bool "Enable m bit on bus for instruction fetches"
+
+config HID0_INIT_DECAREN
+ bool "Decrementer auto reload"
+
+config HID0_INIT_FBIOB
+ bool "Force indirect branch on the bus"
+
+config HID0_INIT_ABE
+ bool "Enable address broadcast"
+
+config HID0_INIT_NOOPTI
+ bool "No-op data cache touch intructions"
+
+endmenu
+
+menu "HID0 final"
+
+config HID0_FINAL_EMCP
+ bool "Enable machine check int on mcp"
+
+config HID0_FINAL_ECPE
+ bool "Enable cache parity errors"
+
+config HID0_FINAL_EBA
+ bool "Enable address parity checking"
+
+config HID0_FINAL_EBD
+ bool "Enable data parity checking"
+
+choice
+ prompt "HID0 clock configuration"
+
+config HID0_FINAL_CLKOUT_OFF
+ bool "Clock output off"
+
+config HID0_FINAL_CLKOUT_CORE_HALF
+ bool "Core clock / 2"
+
+config HID0_FINAL_CLKOUT_CORE
+ bool "Core clock"
+
+config HID0_FINAL_CLKOUT_BUS
+ bool "Bus clock"
+
+endchoice
+
+config HID0_FINAL_PAR
+ bool "Disable precharge of artry_out"
+
+config HID0_FINAL_DOZE
+ bool "Enable doze mode"
+
+config HID0_FINAL_NAP
+ bool "Enable nap mode"
+
+config HID0_FINAL_SLEEP
+ bool "Enable sleep mode"
+
+config HID0_FINAL_DPM
+ bool "Enable dynamic power management"
+
+config HID0_FINAL_ICE
+ bool "Enable instruction cache"
+
+config HID0_FINAL_DCE
+ bool "Enable data cache"
+
+config HID0_FINAL_ILOCK
+ bool "Lock instruction cache"
+
+config HID0_FINAL_DLOCK
+ bool "Lock data cache"
+
+config HID0_FINAL_ICFI
+ bool "Flash invalidate instruction cache"
+
+config HID0_FINAL_DCFI
+ bool "Flash invalidate data cache"
+
+config HID0_FINAL_IFEM
+ bool "Enable m bit on bus for instruction fetches"
+
+config HID0_FINAL_DECAREN
+ bool "Decrementer auto reload"
+
+config HID0_FINAL_FBIOB
+ bool "Force indirect branch on the bus"
+
+config HID0_FINAL_ABE
+ bool "Enable address broadcast"
+
+config HID0_FINAL_NOOPTI
+ bool "No-op data cache touch intructions"
+
+endmenu
+
+config HID0_INIT_EMCP_BIT
+ hex
+ default 0x0 if !HID0_INIT_EMCP
+ default 0x80000000 if HID0_INIT_EMCP
+
+config HID0_INIT_ECPE_BIT
+ hex
+ default 0x0 if !HID0_INIT_ECPE
+ default 0x40000000 if HID0_INIT_ECPE
+
+config HID0_INIT_EBA_BIT
+ hex
+ default 0x0 if !HID0_INIT_EBA
+ default 0x20000000 if HID0_INIT_EBA
+
+config HID0_INIT_EBD_BIT
+ hex
+ default 0x0 if !HID0_INIT_EBD
+ default 0x10000000 if HID0_INIT_EBD
+
+config HID0_INIT_CLKOUT
+ hex
+ default 0x0 if HID0_INIT_CLKOUT_OFF
+ default 0x8000000 if HID0_INIT_CLKOUT_CORE_HALF
+ default 0x2000000 if HID0_INIT_CLKOUT_CORE
+ default 0xa000000 if HID0_INIT_CLKOUT_BUS
+
+config HID0_INIT_PAR_BIT
+ hex
+ default 0x0 if !HID0_INIT_PAR
+ default 0x1000000 if HID0_INIT_PAR
+
+config HID0_INIT_DOZE_BIT
+ hex
+ default 0x0 if !HID0_INIT_DOZE
+ default 0x800000 if HID0_INIT_DOZE
+
+config HID0_INIT_NAP_BIT
+ hex
+ default 0x0 if !HID0_INIT_NAP
+ default 0x400000 if HID0_INIT_NAP
+
+config HID0_INIT_SLEEP_BIT
+ hex
+ default 0x0 if !HID0_INIT_SLEEP
+ default 0x200000 if HID0_INIT_SLEEP
+
+config HID0_INIT_DPM_BIT
+ hex
+ default 0x0 if !HID0_INIT_DPM
+ default 0x100000 if HID0_INIT_DPM
+
+config HID0_INIT_ICE_BIT
+ hex
+ default 0x0 if !HID0_INIT_ICE
+ default 0x8000 if HID0_INIT_ICE
+
+config HID0_INIT_DCE_BIT
+ hex
+ default 0x0 if !HID0_INIT_DCE
+ default 0x4000 if HID0_INIT_DCE
+
+config HID0_INIT_ILOCK_BIT
+ hex
+ default 0x0 if !HID0_INIT_ILOCK
+ default 0x2000 if HID0_INIT_ILOCK
+
+config HID0_INIT_DLOCK_BIT
+ hex
+ default 0x0 if !HID0_INIT_DLOCK
+ default 0x1000 if HID0_INIT_DLOCK
+
+config HID0_INIT_ICFI_BIT
+ hex
+ default 0x0 if !HID0_INIT_ICFI
+ default 0x800 if HID0_INIT_ICFI
+
+config HID0_INIT_DCFI_BIT
+ hex
+ default 0x0 if !HID0_INIT_DCFI
+ default 0x400 if HID0_INIT_DCFI
+
+config HID0_INIT_IFEM_BIT
+ hex
+ default 0x0 if !HID0_INIT_IFEM
+ default 0x80 if HID0_INIT_IFEM
+
+config HID0_INIT_DECAREN_BIT
+ hex
+ default 0x0 if !HID0_INIT_DECAREN
+ default 0x40 if HID0_INIT_DECAREN
+
+config HID0_INIT_FBIOB_BIT
+ hex
+ default 0x0 if !HID0_INIT_FBIOB
+ default 0x10 if HID0_INIT_FBIOB
+
+config HID0_INIT_ABE_BIT
+ hex
+ default 0x0 if !HID0_INIT_ABE
+ default 0x8 if HID0_INIT_ABE
+
+config HID0_INIT_NOOPTI_BIT
+ hex
+ default 0x0 if !HID0_INIT_NOOPTI
+ default 0x1 if HID0_INIT_NOOPTI
+
+config HID0_FINAL_EMCP_BIT
+ hex
+ default 0x0 if !HID0_FINAL_EMCP
+ default 0x80000000 if HID0_FINAL_EMCP
+
+config HID0_FINAL_ECPE_BIT
+ hex
+ default 0x0 if !HID0_FINAL_ECPE
+ default 0x40000000 if HID0_FINAL_ECPE
+
+config HID0_FINAL_EBA_BIT
+ hex
+ default 0x0 if !HID0_FINAL_EBA
+ default 0x20000000 if HID0_FINAL_EBA
+
+config HID0_FINAL_EBD_BIT
+ hex
+ default 0x0 if !HID0_FINAL_EBD
+ default 0x10000000 if HID0_FINAL_EBD
+
+config HID0_FINAL_CLKOUT
+ hex
+ default 0x0 if HID0_FINAL_CLKOUT_OFF
+ default 0x8000000 if HID0_FINAL_CLKOUT_CORE_HALF
+ default 0x2000000 if HID0_FINAL_CLKOUT_CORE
+ default 0xa000000 if HID0_FINAL_CLKOUT_BUS
+
+config HID0_FINAL_SBCLK_BIT
+ hex
+ default 0x0 if !HID0_FINAL_SBCLK
+ default 0x8000000 if HID0_FINAL_SBCLK
+
+config HID0_FINAL_ECLK_BIT
+ hex
+ default 0x0 if !HID0_FINAL_ECLK
+ default 0x2000000 if HID0_FINAL_ECLK
+
+config HID0_FINAL_PAR_BIT
+ hex
+ default 0x0 if !HID0_FINAL_PAR
+ default 0x1000000 if HID0_FINAL_PAR
+
+config HID0_FINAL_DOZE_BIT
+ hex
+ default 0x0 if !HID0_FINAL_DOZE
+ default 0x800000 if HID0_FINAL_DOZE
+
+config HID0_FINAL_NAP_BIT
+ hex
+ default 0x0 if !HID0_FINAL_NAP
+ default 0x400000 if HID0_FINAL_NAP
+
+config HID0_FINAL_SLEEP_BIT
+ hex
+ default 0x0 if !HID0_FINAL_SLEEP
+ default 0x200000 if HID0_FINAL_SLEEP
+
+config HID0_FINAL_DPM_BIT
+ hex
+ default 0x0 if !HID0_FINAL_DPM
+ default 0x100000 if HID0_FINAL_DPM
+
+config HID0_FINAL_ICE_BIT
+ hex
+ default 0x0 if !HID0_FINAL_ICE
+ default 0x8000 if HID0_FINAL_ICE
+
+config HID0_FINAL_DCE_BIT
+ hex
+ default 0x0 if !HID0_FINAL_DCE
+ default 0x4000 if HID0_FINAL_DCE
+
+config HID0_FINAL_ILOCK_BIT
+ hex
+ default 0x0 if !HID0_FINAL_ILOCK
+ default 0x2000 if HID0_FINAL_ILOCK
+
+config HID0_FINAL_DLOCK_BIT
+ hex
+ default 0x0 if !HID0_FINAL_DLOCK
+ default 0x1000 if HID0_FINAL_DLOCK
+
+config HID0_FINAL_ICFI_BIT
+ hex
+ default 0x0 if !HID0_FINAL_ICFI
+ default 0x800 if HID0_FINAL_ICFI
+
+config HID0_FINAL_DCFI_BIT
+ hex
+ default 0x0 if !HID0_FINAL_DCFI
+ default 0x400 if HID0_FINAL_DCFI
+
+config HID0_FINAL_IFEM_BIT
+ hex
+ default 0x0 if !HID0_FINAL_IFEM
+ default 0x80 if HID0_FINAL_IFEM
+
+config HID0_FINAL_DECAREN_BIT
+ hex
+ default 0x0 if !HID0_FINAL_DECAREN
+ default 0x40 if HID0_FINAL_DECAREN
+
+config HID0_FINAL_FBIOB_BIT
+ hex
+ default 0x0 if !HID0_FINAL_FBIOB
+ default 0x10 if HID0_FINAL_FBIOB
+
+config HID0_FINAL_ABE_BIT
+ hex
+ default 0x0 if !HID0_FINAL_ABE
+ default 0x8 if HID0_FINAL_ABE
+
+config HID0_FINAL_NOOPTI_BIT
+ hex
+ default 0x0 if !HID0_FINAL_NOOPTI
+ default 0x1 if HID0_FINAL_NOOPTI
+
+menu "HID2"
+
+config HID2_LET
+ bool "True little-endian mode"
+
+config HID2_IFEB
+ bool "Instruction fetch burst extension"
+
+config HID2_MESISTATE
+ bool "MESI state enable"
+
+config HID2_IFEC
+ bool "Instruction fetch cancel extension"
+
+config HID2_EBQS
+ bool "BIU queue sharing"
+
+config HID2_EBPX
+ bool "BIU pipeline extension"
+
+if !ARCH_MPC8360
+
+config HID2_ELRW
+ bool "Weighted LRU"
+
+config HID2_NOKS
+ bool "No kill for snoop"
+
+endif
+
+config HID2_HBE
+ bool "High bat enable"
+
+choice
+ prompt "Instruction cache way-lock"
+
+config HID2_IWLCK_NONE
+ bool "No ways locked"
+
+config HID2_IWLCK_0
+ bool "Way 0 locked"
+
+config HID2_IWLCK_1
+ bool "Way 0 through 1 locked"
+
+config HID2_IWLCK_2
+ bool "Way 0 through 2 locked"
+
+if ARCH_MPC8349 || ARCH_MPC8360 || ARCH_MPC8379
+
+config HID2_IWLCK_3
+ bool "Way 0 through 3 locked"
+
+config HID2_IWLCK_4
+ bool "Way 0 through 4 locked"
+
+config HID2_IWLCK_5
+ bool "Way 0 through 5 locked"
+
+config HID2_IWLCK_6
+ bool "Way 0 through 6 locked"
+
+endif
+
+endchoice
+
+config HID2_ICWP
+ bool "Instruction cache way protection"
+
+choice
+ prompt "Data cache way-lock"
+
+config HID2_DWLCK_NONE
+ bool "No ways locked"
+
+config HID2_DWLCK_0
+ bool "Way 0 locked"
+
+config HID2_DWLCK_1
+ bool "Way 0 through 1 locked"
+
+config HID2_DWLCK_2
+ bool "Way 0 through 2 locked"
+
+if ARCH_MPC8349 || ARCH_MPC8360 || ARCH_MPC8379
+
+config HID2_DWLCK_3
+ bool "Way 0 through 3 locked"
+
+config HID2_DWLCK_4
+ bool "Way 0 through 4 locked"
+
+config HID2_DWLCK_5
+ bool "Way 0 through 5 locked"
+
+config HID2_DWLCK_6
+ bool "Way 0 through 6 locked"
+
+endif
+
+endchoice
+
+config HID2_LET_BIT
+ hex
+ default 0x0 if !HID2_LET
+ default 0x8000000 if HID2_LET
+
+config HID2_IFEB_BIT
+ hex
+ default 0x0 if !HID2_IFEB
+ default 0x4000000 if HID2_IFEB
+
+config HID2_MESISTATE_BIT
+ hex
+ default 0x0 if !HID2_MESISTATE
+ default 0x1000000 if HID2_MESISTATE
+
+config HID2_IFEC_BIT
+ hex
+ default 0x0 if !HID2_IFEC
+ default 0x800000 if HID2_IFEC
+
+config HID2_EBQS_BIT
+ hex
+ default 0x0 if !HID2_EBQS
+ default 0x400000 if HID2_EBQS
+
+config HID2_EBPX_BIT
+ hex
+ default 0x0 if !HID2_EBPX
+ default 0x200000 if HID2_EBPX
+
+config HID2_ELRW_BIT
+ hex
+ default 0x0 if !HID2_ELRW
+ default 0x100000 if HID2_ELRW
+
+config HID2_NOKS_BIT
+ hex
+ default 0x0 if !HID2_NOKS
+ default 0x80000 if HID2_NOKS
+
+config HID2_HBE_BIT
+ hex
+ default 0x0 if !HID2_HBE
+ default 0x40000 if HID2_HBE
+
+config HID2_IWLCK
+ hex
+ default 0x0 if HID2_IWLCK_NONE
+ default 0x2000 if HID2_IWLCK_0
+ default 0x4000 if HID2_IWLCK_1
+ default 0x6000 if HID2_IWLCK_2
+ default 0x8000 if HID2_IWLCK_3
+ default 0xA000 if HID2_IWLCK_4
+ default 0xC000 if HID2_IWLCK_5
+ default 0xE000 if HID2_IWLCK_6
+
+config HID2_ICWP_BIT
+ hex
+ default 0x0 if !HID2_ICWP
+ default 0x1000 if HID2_ICWP
+
+config HID2_DWLCK
+ hex
+ default 0x0 if HID2_DWLCK_NONE
+ default 0x20 if HID2_DWLCK_0
+ default 0x40 if HID2_DWLCK_1
+ default 0x60 if HID2_DWLCK_2
+ default 0x80 if HID2_DWLCK_3
+ default 0xA0 if HID2_DWLCK_4
+ default 0xC0 if HID2_DWLCK_5
+ default 0xE0 if HID2_DWLCK_6
+
+endmenu
+
+endmenu
new file mode 100644
@@ -0,0 +1,72 @@
+#define CONFIG_SYS_HID0_FINAL ( \
+ CONFIG_HID0_FINAL_ABE_BIT |\
+ CONFIG_HID0_FINAL_CLKOUT |\
+ CONFIG_HID0_FINAL_DCE_BIT |\
+ CONFIG_HID0_FINAL_DCFI_BIT |\
+ CONFIG_HID0_FINAL_DECAREN_BIT |\
+ CONFIG_HID0_FINAL_DLOCK_BIT |\
+ CONFIG_HID0_FINAL_DOZE_BIT |\
+ CONFIG_HID0_FINAL_DPM_BIT |\
+ CONFIG_HID0_FINAL_EBA_BIT |\
+ CONFIG_HID0_FINAL_EBD_BIT |\
+ CONFIG_HID0_FINAL_ECLK_BIT |\
+ CONFIG_HID0_FINAL_ECPE_BIT |\
+ CONFIG_HID0_FINAL_EMCP_BIT |\
+ CONFIG_HID0_FINAL_FBIOB_BIT |\
+ CONFIG_HID0_FINAL_ICE_BIT |\
+ CONFIG_HID0_FINAL_ICFI_BIT |\
+ CONFIG_HID0_FINAL_IFEM_BIT |\
+ CONFIG_HID0_FINAL_ILOCK_BIT |\
+ CONFIG_HID0_FINAL_NAP_BIT |\
+ CONFIG_HID0_FINAL_NOOPTI_BIT |\
+ CONFIG_HID0_FINAL_PAR_BIT |\
+ CONFIG_HID0_FINAL_SBCLK_BIT |\
+ CONFIG_HID0_FINAL_SLEEP_BIT \
+)
+
+#define CONFIG_SYS_HID0_INIT ( \
+ CONFIG_HID0_INIT_ABE_BIT |\
+ CONFIG_HID0_INIT_CLKOUT |\
+ CONFIG_HID0_INIT_DCE_BIT |\
+ CONFIG_HID0_INIT_DCFI_BIT |\
+ CONFIG_HID0_INIT_DECAREN_BIT |\
+ CONFIG_HID0_INIT_DLOCK_BIT |\
+ CONFIG_HID0_INIT_DOZE_BIT |\
+ CONFIG_HID0_INIT_DPM_BIT |\
+ CONFIG_HID0_INIT_EBA_BIT |\
+ CONFIG_HID0_INIT_EBD_BIT |\
+ CONFIG_HID0_INIT_ECPE_BIT |\
+ CONFIG_HID0_INIT_EMCP_BIT |\
+ CONFIG_HID0_INIT_FBIOB_BIT |\
+ CONFIG_HID0_INIT_ICE_BIT |\
+ CONFIG_HID0_INIT_ICFI_BIT |\
+ CONFIG_HID0_INIT_IFEM_BIT |\
+ CONFIG_HID0_INIT_ILOCK_BIT |\
+ CONFIG_HID0_INIT_NAP_BIT |\
+ CONFIG_HID0_INIT_NOOPTI_BIT |\
+ CONFIG_HID0_INIT_PAR_BIT |\
+ CONFIG_HID0_INIT_SLEEP_BIT \
+)
+
+#ifdef CONFIG_TARGET_IDS8313
+/* IDS8313 defines a reserved bit; keep to not break compatibility */
+#define CONFIG_HID2_SPECIAL 0x00020000
+#else
+#define CONFIG_HID2_SPECIAL 0x0
+#endif
+
+#define CONFIG_SYS_HID2 ( \
+ CONFIG_HID2_LET_BIT |\
+ CONFIG_HID2_IFEB_BIT |\
+ CONFIG_HID2_MESISTATE_BIT |\
+ CONFIG_HID2_IFEC_BIT |\
+ CONFIG_HID2_EBQS_BIT |\
+ CONFIG_HID2_EBPX_BIT |\
+ CONFIG_HID2_ELRW_BIT |\
+ CONFIG_HID2_NOKS_BIT |\
+ CONFIG_HID2_HBE_BIT |\
+ CONFIG_HID2_IWLCK |\
+ CONFIG_HID2_ICWP_BIT |\
+ CONFIG_HID2_DWLCK |\
+ CONFIG_HID2_SPECIAL \
+)
@@ -26,6 +26,7 @@
#include "hrcw/hrcw.h"
#include "bats/bats.h"
+#include "hid/hid.h"
/* We don't want the MMU yet.
*/
@@ -58,6 +58,10 @@ CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -73,6 +73,10 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xFA000000
CONFIG_LBLAW3_NAME="BCSR"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
@@ -72,6 +72,10 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xFA000000
CONFIG_LBLAW3_NAME="BCSR"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
@@ -75,6 +75,10 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xFA000000
CONFIG_LBLAW3_NAME="BCSR"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
@@ -74,6 +74,10 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xFA000000
CONFIG_LBLAW3_NAME="BCSR"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
@@ -76,6 +76,10 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -70,6 +70,9 @@ CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -68,6 +68,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"
@@ -88,6 +88,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI_33M,PQ_MDS_PIB=1"
@@ -88,6 +88,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI_66M,PQ_MDS_PIB=1"
@@ -85,6 +85,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
@@ -68,6 +68,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -53,6 +53,9 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2400000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -57,6 +57,9 @@ CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="SDRAM"
CONFIG_LBLAW2_LENGTH_64_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_ELBC_BR0_OR0=y
CONFIG_BR0_OR0_NAME="FLASH"
CONFIG_BR0_OR0_BASE=0xFE000000
@@ -51,6 +51,9 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2400000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_PCI_ONE_PCI1=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -53,6 +53,9 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2400000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_PCI_ONE_PCI1=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -97,6 +97,8 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF0000000
CONFIG_LBLAW3_NAME="CF"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000"
@@ -97,6 +97,8 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF0000000
CONFIG_LBLAW3_NAME="CF"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -96,6 +96,8 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF0000000
CONFIG_LBLAW3_NAME="CF"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -101,6 +101,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE0600000
CONFIG_LBLAW3_NAME="NAND"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -61,6 +61,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE0600000
CONFIG_LBLAW3_NAME="NAND"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
@@ -81,6 +81,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE0600000
CONFIG_LBLAW3_NAME="NAND"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -61,6 +61,9 @@ CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE,PCIE"
@@ -101,6 +101,9 @@ CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCIE"
@@ -102,6 +102,8 @@ CONFIG_LBLAW2=y
# CONFIG_LBLAW2_ENABLE is not set
CONFIG_LBLAW3=y
# CONFIG_LBLAW3_ENABLE is not set
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -71,6 +71,9 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF0000000
CONFIG_LBLAW1_NAME="WINDOW1"
CONFIG_LBLAW1_LENGTH_256_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -54,6 +54,10 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -54,6 +54,10 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -70,6 +70,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE3000000
CONFIG_LBLAW3_NAME="CPLD"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_IMAGE_FORMAT_LEGACY=y
@@ -104,6 +104,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xA0000000
CONFIG_LBLAW3_NAME="PAXE"
CONFIG_LBLAW3_LENGTH_512_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
@@ -77,6 +77,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xA0000000
CONFIG_LBLAW3_NAME="PAXE"
CONFIG_LBLAW3_LENGTH_512_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
@@ -92,6 +92,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
@@ -78,6 +78,9 @@ CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
@@ -79,6 +79,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1"
@@ -92,6 +92,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
@@ -93,6 +93,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMVECT1"
@@ -56,6 +56,10 @@ CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xFBFF8000
CONFIG_LBLAW2_NAME="CPLD"
CONFIG_LBLAW2_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=5
@@ -69,6 +69,9 @@ CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFF800000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -69,6 +69,9 @@ CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFF800000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -49,6 +49,9 @@ CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFF800000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -53,6 +53,10 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -53,6 +53,10 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -53,6 +53,10 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -53,6 +53,10 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_DPM=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -92,6 +92,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SUVD3"
@@ -78,6 +78,9 @@ CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
@@ -92,6 +92,9 @@ CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
@@ -74,6 +74,9 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0x61000000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
@@ -71,6 +71,9 @@ CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF0000000
CONFIG_LBLAW1_NAME="WINDOW1"
CONFIG_LBLAW1_LENGTH_256_KBYTES=y
+CONFIG_HID0_FINAL_EMCP=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -332,15 +332,6 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE | \
- HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Environment Configuration
*/
@@ -362,13 +362,6 @@
/* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC)
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE | \
- HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
/*
* Environment Configuration
*/
@@ -338,13 +338,6 @@
/* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC)
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE | \
- HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
/*
* Environment Configuration
*/
@@ -357,15 +357,6 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE | \
- HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* MMU Setup
*/
@@ -272,14 +272,6 @@
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
-/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
#if (CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
@@ -290,14 +290,6 @@
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
-/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
@@ -341,17 +341,6 @@
#define CONFIG_SYS_SICRH 0
#define CONFIG_SYS_SICRL SICRL_LDP_A
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK \
- | HID0_ENABLE_INSTRUCTION_CACHE)
-
-/* #define CONFIG_SYS_HID0_FINAL (\
- HID0_ENABLE_INSTRUCTION_CACHE |\
- HID0_ENABLE_M_BIT |\
- HID0_ENABLE_ADDRESS_BROADCAST) */
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
#endif
@@ -396,17 +396,6 @@
#define CONFIG_SYS_SICRH 0
#define CONFIG_SYS_SICRL SICRL_LDP_A
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK \
- | HID0_ENABLE_INSTRUCTION_CACHE)
-
-/* #define CONFIG_SYS_HID0_FINAL (\
- HID0_ENABLE_INSTRUCTION_CACHE |\
- HID0_ENABLE_M_BIT |\
- HID0_ENABLE_ADDRESS_BROADCAST) */
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
#endif
@@ -425,11 +425,6 @@ boards, we say we have two, but don't display a message if we find only one. */
/* USB DR as device + USB MPH as host */
#define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1)
-#define CONFIG_SYS_HID0_INIT 0x00000000
-#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_INSTRUCTION_CACHE
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
@@ -361,14 +361,6 @@ extern int board_pci_host_broken(void);
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
-/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
@@ -382,14 +382,6 @@
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
-/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK \
- | HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
@@ -237,12 +237,6 @@
#define CONFIG_SYS_SICRH 0
#define CONFIG_SYS_SICRL SICRL_LDP_A
-/* i-cache and d-cache disabled */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
/* PCI */
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
@@ -263,12 +263,6 @@
#define CONFIG_SYS_SICRH 0
#define CONFIG_SYS_SICRL SICRL_LDP_A
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
#define CONFIG_SYS_GPIO1_PRELIM
#define CONFIG_SYS_GPIO1_DIR 0x00100000
#define CONFIG_SYS_GPIO1_DAT 0x00100000
@@ -441,15 +441,6 @@ void fpga_control_clear(unsigned int bus, int pin);
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE | \
- HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Environment Configuration
*/
@@ -30,13 +30,6 @@
#define CONFIG_HWCONFIG
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK |\
- HID0_ENABLE_INSTRUCTION_CACHE |\
- HID0_DISABLE_DYNAMIC_POWER_MANAGMENT)
-
-#define CONFIG_SYS_HID2 (HID2_HBE | 0x00020000)
-
/*
* Definitions for initial stack pointer and data area (in DCACHE )
*/
@@ -208,14 +208,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -194,14 +194,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -213,14 +213,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -213,14 +213,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -217,14 +217,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -213,14 +213,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -209,14 +209,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -310,15 +310,6 @@
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE | \
- HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Environment Configuration
*/
@@ -283,17 +283,6 @@
#define CONFIG_SYS_SICRH 0
#define CONFIG_SYS_SICRL SICRL_LDP_A
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK \
- | HID0_ENABLE_INSTRUCTION_CACHE)
-
-/* #define CONFIG_SYS_HID0_FINAL (\
- HID0_ENABLE_INSTRUCTION_CACHE |\
- HID0_ENABLE_M_BIT |\
- HID0_ENABLE_ADDRESS_BROADCAST) */
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
#endif
@@ -474,15 +474,6 @@ void fpga_control_clear(unsigned int bus, int pin);
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE | \
- HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Environment Configuration
*/
@@ -210,14 +210,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -213,14 +213,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -213,14 +213,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
- * Core HID Setup
- */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-#define CONFIG_SYS_HID2 HID2_HBE
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -268,12 +268,6 @@
SICRL_ETSEC2_A)
/* 0x33fc0003) */
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
#define CONFIG_NETDEV eth0
#define CONFIG_HOSTNAME "ve8313"
@@ -263,12 +263,6 @@
#define CONFIG_SYS_SICRH 0
#define CONFIG_SYS_SICRL SICRL_LDP_A
-#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
- HID0_ENABLE_INSTRUCTION_CACHE)
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
#define CONFIG_SYS_GPIO1_PRELIM
#define CONFIG_SYS_GPIO1_DIR 0x00100000
#define CONFIG_SYS_GPIO1_DAT 0x00100000
@@ -2987,9 +2987,6 @@ CONFIG_SYS_GPSR2_VAL
CONFIG_SYS_GPSR3_VAL
CONFIG_SYS_HALT_BEFOR_RAM_JUMP
CONFIG_SYS_HELP_CMD_WIDTH
-CONFIG_SYS_HID0_FINAL
-CONFIG_SYS_HID0_INIT
-CONFIG_SYS_HID2
CONFIG_SYS_HIGH
CONFIG_SYS_HMI_BASE
CONFIG_SYS_HOSTNAME
Mirate the HID configuration settings to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc> --- v1 -> v2: New in v2 --- arch/powerpc/cpu/mpc83xx/Kconfig | 1 + arch/powerpc/cpu/mpc83xx/hid/Kconfig | 565 ++++++++++++++++++++++++++++++++++ arch/powerpc/cpu/mpc83xx/hid/hid.h | 72 +++++ arch/powerpc/cpu/mpc83xx/start.S | 1 + configs/MPC8308RDB_defconfig | 4 + configs/MPC8313ERDB_33_defconfig | 4 + configs/MPC8313ERDB_66_defconfig | 4 + configs/MPC8313ERDB_NAND_33_defconfig | 4 + configs/MPC8313ERDB_NAND_66_defconfig | 4 + configs/MPC8315ERDB_defconfig | 4 + configs/MPC8323ERDB_defconfig | 3 + configs/MPC832XEMDS_ATM_defconfig | 3 + configs/MPC832XEMDS_HOST_33_defconfig | 3 + configs/MPC832XEMDS_HOST_66_defconfig | 3 + configs/MPC832XEMDS_SLAVE_defconfig | 3 + configs/MPC832XEMDS_defconfig | 3 + configs/MPC8349EMDS_PCI64_defconfig | 3 + configs/MPC8349EMDS_SDRAM_defconfig | 3 + configs/MPC8349EMDS_SLAVE_defconfig | 3 + configs/MPC8349EMDS_defconfig | 3 + configs/MPC8349ITXGP_defconfig | 2 + configs/MPC8349ITX_LOWBOOT_defconfig | 2 + configs/MPC8349ITX_defconfig | 2 + configs/MPC837XEMDS_HOST_defconfig | 3 + configs/MPC837XEMDS_SLAVE_defconfig | 3 + configs/MPC837XEMDS_defconfig | 3 + configs/MPC837XERDB_SLAVE_defconfig | 3 + configs/MPC837XERDB_defconfig | 3 + configs/TQM834x_defconfig | 2 + configs/caddy2_defconfig | 3 + configs/hrcon_defconfig | 4 + configs/hrcon_dh_defconfig | 4 + configs/ids8313_defconfig | 3 + configs/kmcoge5ne_defconfig | 3 + configs/kmeter1_defconfig | 3 + configs/kmopti2_defconfig | 3 + configs/kmsupx5_defconfig | 3 + configs/kmtegr1_defconfig | 3 + configs/kmtepr2_defconfig | 3 + configs/kmvect1_defconfig | 3 + configs/mpc8308_p1m_defconfig | 4 + configs/sbc8349_PCI_33_defconfig | 3 + configs/sbc8349_PCI_66_defconfig | 3 + configs/sbc8349_defconfig | 3 + configs/strider_con_defconfig | 4 + configs/strider_con_dp_defconfig | 4 + configs/strider_cpu_defconfig | 4 + configs/strider_cpu_dp_defconfig | 4 + configs/suvd3_defconfig | 3 + configs/tuge1_defconfig | 3 + configs/tuxx1_defconfig | 3 + configs/ve8313_defconfig | 3 + configs/vme8349_defconfig | 3 + include/configs/MPC8308RDB.h | 9 - include/configs/MPC8313ERDB_NAND.h | 7 - include/configs/MPC8313ERDB_NOR.h | 7 - include/configs/MPC8315ERDB.h | 9 - include/configs/MPC8323ERDB.h | 8 - include/configs/MPC832XEMDS.h | 8 - include/configs/MPC8349EMDS.h | 11 - include/configs/MPC8349EMDS_SDRAM.h | 11 - include/configs/MPC8349ITX.h | 5 - include/configs/MPC837XEMDS.h | 8 - include/configs/MPC837XERDB.h | 8 - include/configs/TQM834x.h | 6 - include/configs/caddy2.h | 6 - include/configs/hrcon.h | 9 - include/configs/ids8313.h | 7 - include/configs/kmcoge5ne.h | 8 - include/configs/kmeter1.h | 8 - include/configs/kmopti2.h | 8 - include/configs/kmsupx5.h | 8 - include/configs/kmtegr1.h | 8 - include/configs/kmtepr2.h | 8 - include/configs/kmvect1.h | 8 - include/configs/mpc8308_p1m.h | 9 - include/configs/sbc8349.h | 11 - include/configs/strider.h | 9 - include/configs/suvd3.h | 8 - include/configs/tuge1.h | 8 - include/configs/tuxx1.h | 8 - include/configs/ve8313.h | 6 - include/configs/vme8349.h | 6 - scripts/config_whitelist.txt | 3 - 84 files changed, 795 insertions(+), 243 deletions(-) create mode 100644 arch/powerpc/cpu/mpc83xx/hid/Kconfig create mode 100644 arch/powerpc/cpu/mpc83xx/hid/hid.h