@@ -39,6 +39,12 @@ config MPC8xx
endchoice
+config HIGH_BATS
+ bool "Enable high BAT registers"
+ help
+ Enable BATs (block address translation registers) 4-7 on machines
+ that support them.
+
source "arch/powerpc/cpu/mpc83xx/Kconfig"
source "arch/powerpc/cpu/mpc85xx/Kconfig"
source "arch/powerpc/cpu/mpc86xx/Kconfig"
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=33333333
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8313ERDB_NOR=y
CONFIG_SYSTEM_PLL_FACTOR_5_1=y
CONFIG_CORE_PLL_RATIO_2_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66666667
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8313ERDB_NOR=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_PCI_HOST_MODE_ENABLE=y
@@ -4,6 +4,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
CONFIG_SYS_CLK_FREQ=33333333
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8313ERDB_NAND=y
CONFIG_SYSTEM_PLL_FACTOR_5_1=y
CONFIG_CORE_PLL_RATIO_2_1=y
@@ -4,6 +4,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
CONFIG_SYS_CLK_FREQ=66666667
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8313ERDB_NAND=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_PCI_HOST_MODE_ENABLE=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66666667
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8315ERDB=y
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
CONFIG_CORE_PLL_RATIO_3_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66666667
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8323ERDB=y
CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC832XEMDS=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8349EMDS=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8349EMDS_SDRAM=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66666666
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8349EMDS=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8349EMDS=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66666666
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8349ITX=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66666666
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8349ITX=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFEF00000
CONFIG_SYS_CLK_FREQ=66666666
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8349ITX=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC837XEMDS=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_6_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC837XEMDS=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_6_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=66666667
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC837XERDB=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_5_1=y
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xfff00000
CONFIG_MPC86xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8610HPCD=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xeff00000
CONFIG_MPC86xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8641HPCN=y
CONFIG_PHYS_64BIT=y
CONFIG_OF_BOARD_SETUP=y
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xeff00000
CONFIG_MPC86xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_MPC8641HPCN=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0x80000000
CONFIG_SYS_CLK_FREQ=66666000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_TQM834X=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF00000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_CADDY2=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF00000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_IDS8313=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_PCI_HOST_MODE_ENABLE=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_KMCOGE5NE=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_VCO_DIV_4=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_KMOPTI2=y
CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_KMSUPX5=y
CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_KMTEGR1=y
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
CONFIG_CORE_PLL_RATIO_2_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_KMTEPR2=y
CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_KMVECT1=y
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
CONFIG_CORE_PLL_RATIO_2_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFF800000
CONFIG_SYS_CLK_FREQ=33000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_SBC8349=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_8_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFF800000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_SBC8349=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFF800000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_SBC8349=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xfff00000
CONFIG_MPC86xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_SBC8641D=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_SUVD3=y
CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_TUGE1=y
CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_TUXX1=y
CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_SYS_CLK_FREQ=32000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_VE8313=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
CONFIG_CORE_PLL_RATIO_25_1=y
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF00000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_VME8349=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xfff00000
CONFIG_MPC86xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_XPEDITE517X=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -438,8 +438,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW)
#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
@@ -415,8 +415,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW)
#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
@@ -404,7 +404,6 @@
/*
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
@@ -300,7 +300,6 @@
/*
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
@@ -364,8 +364,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
| BATL_PP_RW \
@@ -381,7 +381,6 @@
HID0_ENABLE_ADDRESS_BROADCAST) */
#define CONFIG_SYS_HID2 HID2_HBE
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
@@ -453,7 +453,6 @@
HID0_ENABLE_ADDRESS_BROADCAST) */
#define CONFIG_SYS_HID2 HID2_HBE
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
@@ -481,7 +481,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_INSTRUCTION_CACHE
#define CONFIG_SYS_HID2 HID2_HBE
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* DDR */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
@@ -423,7 +423,6 @@ extern int board_pci_host_broken(void);
/*
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* DDR: cache cacheable */
#define CONFIG_SYS_SDRAM_LOWER CONFIG_SYS_SDRAM_BASE
@@ -439,8 +439,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_SDRAM_LOWER CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_SDRAM_UPPER (CONFIG_SYS_SDRAM_BASE + 0x10000000)
@@ -43,7 +43,6 @@
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
#define CONFIG_BAT_RW 1 /* Use common BAT rw code */
-#define CONFIG_HIGH_BATS 1 /* High BATs supported & enabled */
#define CONFIG_ALTIVEC 1
/*
@@ -45,7 +45,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAT_RW 1 /* Use common BAT rw code */
-#define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */
#define CONFIG_SYS_NUM_ADDR_MAP 8 /* Number of addr map slots = 8 dbats */
#define CONFIG_ALTIVEC 1
@@ -270,8 +270,6 @@
HID0_ENABLE_INSTRUCTION_CACHE)
#define CONFIG_SYS_HID2 HID2_HBE
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR 0 - 512M */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
| BATL_PP_RW \
@@ -302,8 +302,6 @@
#define CONFIG_SYS_GPIO2_DIR 0x78900000
#define CONFIG_SYS_GPIO2_DAT 0x70100000
-#define CONFIG_HIGH_BATS /* High BATs supported */
-
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_MEMCOHERENCE)
@@ -295,7 +295,6 @@
/*
* BAT's
*/
-#define CONFIG_HIGH_BATS
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE |\
@@ -242,8 +242,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -228,8 +228,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -247,8 +247,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -247,8 +247,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -251,8 +251,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -247,8 +247,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -243,8 +243,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -383,8 +383,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
| BATL_PP_RW \
@@ -45,7 +45,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAT_RW 1 /* Use common BAT rw code */
-#define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */
#undef CONFIG_SPD_EEPROM /* Do not use SPD EEPROM for DDR setup*/
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
@@ -244,8 +244,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -247,8 +247,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -247,8 +247,6 @@
* MMU Setup
*/
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR: cache cacheable */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
@@ -333,8 +333,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW)
#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
@@ -302,8 +302,6 @@
#define CONFIG_SYS_GPIO2_DIR 0x78900000
#define CONFIG_SYS_GPIO2_DAT 0x70100000
-#define CONFIG_HIGH_BATS /* High BATs supported */
-
/* DDR @ 0x00000000 */
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
BATL_MEMCOHERENCE)
@@ -17,7 +17,6 @@
#define CONFIG_SYS_FORM_3U_VPX 1
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
#define CONFIG_BAT_RW 1 /* Use common BAT rw code */
-#define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */
#define CONFIG_ALTIVEC 1
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
@@ -769,7 +769,6 @@ CONFIG_HDBOOT
CONFIG_HDMI_ENCODER_I2C_ADDR
CONFIG_HETROGENOUS_CLUSTERS
CONFIG_HIDE_LOGO_VERSION
-CONFIG_HIGH_BATS
CONFIG_HIKEY_GPIO
CONFIG_HITACHI_SX14
CONFIG_HOSTNAME
Migrate the CONFIG_HIGH_BATS variable to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc> --- v1 -> v2: * Removed config option from whitelist --- arch/powerpc/Kconfig | 6 ++++++ configs/MPC8313ERDB_33_defconfig | 1 + configs/MPC8313ERDB_66_defconfig | 1 + configs/MPC8313ERDB_NAND_33_defconfig | 1 + configs/MPC8313ERDB_NAND_66_defconfig | 1 + configs/MPC8315ERDB_defconfig | 1 + configs/MPC8323ERDB_defconfig | 1 + configs/MPC832XEMDS_ATM_defconfig | 1 + configs/MPC832XEMDS_HOST_33_defconfig | 1 + configs/MPC832XEMDS_HOST_66_defconfig | 1 + configs/MPC832XEMDS_SLAVE_defconfig | 1 + configs/MPC832XEMDS_defconfig | 1 + configs/MPC8349EMDS_PCI64_defconfig | 1 + configs/MPC8349EMDS_SDRAM_defconfig | 1 + configs/MPC8349EMDS_SLAVE_defconfig | 1 + configs/MPC8349EMDS_defconfig | 1 + configs/MPC8349ITXGP_defconfig | 1 + configs/MPC8349ITX_LOWBOOT_defconfig | 1 + configs/MPC8349ITX_defconfig | 1 + configs/MPC837XEMDS_HOST_defconfig | 1 + configs/MPC837XEMDS_defconfig | 1 + configs/MPC837XERDB_defconfig | 1 + configs/MPC8610HPCD_defconfig | 1 + configs/MPC8641HPCN_36BIT_defconfig | 1 + configs/MPC8641HPCN_defconfig | 1 + configs/TQM834x_defconfig | 1 + configs/caddy2_defconfig | 1 + configs/ids8313_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmopti2_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmtegr1_defconfig | 1 + configs/kmtepr2_defconfig | 1 + configs/kmvect1_defconfig | 1 + configs/sbc8349_PCI_33_defconfig | 1 + configs/sbc8349_PCI_66_defconfig | 1 + configs/sbc8349_defconfig | 1 + configs/sbc8641d_defconfig | 1 + configs/suvd3_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/tuxx1_defconfig | 1 + configs/ve8313_defconfig | 1 + configs/vme8349_defconfig | 1 + configs/xpedite517x_defconfig | 1 + include/configs/MPC8313ERDB_NAND.h | 2 -- include/configs/MPC8313ERDB_NOR.h | 2 -- include/configs/MPC8315ERDB.h | 1 - include/configs/MPC8323ERDB.h | 1 - include/configs/MPC832XEMDS.h | 2 -- include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349EMDS_SDRAM.h | 1 - include/configs/MPC8349ITX.h | 1 - include/configs/MPC837XEMDS.h | 1 - include/configs/MPC837XERDB.h | 2 -- include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/TQM834x.h | 2 -- include/configs/caddy2.h | 2 -- include/configs/ids8313.h | 1 - include/configs/kmcoge5ne.h | 2 -- include/configs/kmeter1.h | 2 -- include/configs/kmopti2.h | 2 -- include/configs/kmsupx5.h | 2 -- include/configs/kmtegr1.h | 2 -- include/configs/kmtepr2.h | 2 -- include/configs/kmvect1.h | 2 -- include/configs/sbc8349.h | 2 -- include/configs/sbc8641d.h | 1 - include/configs/suvd3.h | 2 -- include/configs/tuge1.h | 2 -- include/configs/tuxx1.h | 2 -- include/configs/ve8313.h | 2 -- include/configs/vme8349.h | 2 -- include/configs/xpedite517x.h | 1 - scripts/config_whitelist.txt | 1 - 75 files changed, 49 insertions(+), 50 deletions(-)