From patchwork Wed Sep 5 02:12:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 966180 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="VV44beIS"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 424ndh6wcZz9s3Z for ; Wed, 5 Sep 2018 12:26:48 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id AE275C21CB6; Wed, 5 Sep 2018 02:21:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=BAD_ENC_HEADER, SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 14596C21F17; Wed, 5 Sep 2018 02:08:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 30FFCC21EEF; Wed, 5 Sep 2018 02:08:08 +0000 (UTC) Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-db5eur01on0087.outbound.protection.outlook.com [104.47.2.87]) by lists.denx.de (Postfix) with ESMTPS id B31E6C21EB1 for ; Wed, 5 Sep 2018 02:07:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8zpwEXBkgtVhxozAXEeblduYUZxNnmzVsymNmC9LoPw=; b=VV44beISSPfIvsQC9xKmXX6ykzqVSIuYwzBapwSwag+XxE/9h/+giFUUBQhceVB+NYybxMxMVOLTUK8z+CnvKjkDISyW1eK/iAnVJWNNtvTTh9Rt7Kw+kQOiz/OmB+z2cuILMgLpIG5pN6K6AzSrLhjEuNfD8c/HOt6hOjnwA88= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; Received: from linux-u7w5.ap.freescale.net.net (92.121.68.129) by VI1PR04MB4496.eurprd04.prod.outlook.com (2603:10a6:803:69::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1101.18; Wed, 5 Sep 2018 02:07:48 +0000 From: Peng Fan To: sbabic@denx.de Date: Wed, 5 Sep 2018 10:12:12 +0800 Message-Id: <20180905021219.12828-26-peng.fan@nxp.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180905021219.12828-1-peng.fan@nxp.com> References: <20180905021219.12828-1-peng.fan@nxp.com> MIME-Version: 1.0 X-Originating-IP: [92.121.68.129] X-ClientProxiedBy: HK0PR03CA0022.apcprd03.prod.outlook.com (2603:1096:203:2e::34) To VI1PR04MB4496.eurprd04.prod.outlook.com (2603:10a6:803:69::28) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 902bbba4-a4cd-41a6-d448-08d612d461ea X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0; PCL:0; RULEID:(7020095)(4652040)(8989137)(4534165)(4627221)(201703031133081)(201702281549075)(8990107)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020); SRVR:VI1PR04MB4496; X-Microsoft-Exchange-Diagnostics: 1; VI1PR04MB4496; 3:jtlXCMfTZuYK4i7uU/wl2/yxEBdSpQAYBr5Poy/t/xQOAxBSrSQKGMM4V9Vl1CwjOnh8pf1zv0R7ZODXLEtTlqW29tbF0u3bQti/TNP3wckaX4ljB2wUPFDzpE729jW7XH5qDmR5H6P5RTTXaqqH3s8tSi4RZkhLyhRb387A5TmmB2bs+Os23y8Eyr3bbzyZ6dnKBOp09fPz1QDh0dExCwQ4Rl5JZXmTYGjULHzE/SNJMJ2//b1mHYmCH0T/jToV; 25:R6iP7AQIfsnH86ftUsjf3rcw6z6JfA0FACHpfi42BIt4Dq8r+iCrjBRFZOcPi+wF8KH4K2ZgxsRox3GbIe5TU3ZECMkYzlULFaqJLnQBTWKb8/fNny8iSHBoPlJJaPrChDwNn0w6DVfUo91OOtRN86/9wEWTcxTWYmagshI0bhx8PsmURxUm7tGLNuKag28qFVNUGc6gmb2KxEj3Czzuzq8tJKv3DxGlX5OKmJEDc40VkRKlA/AETP44vQtV4/ph/mwoSv2USbvY8CbT3rbm+ZME0iMchxhkyK57HZ3wdJTghR2Nvh5klDp22g4Pxl5GuzUiB3nnaWuSP7E1SZlFaA==; 31:14Q6p56BTKXvcJfkVsMWaM6IAsxmzqlh6EkkyJUoOpNLC5TSir1wFoai54fTxKCr/EteRVY/hSrS3NAXt/QCeqB8CHicuaWzRPVIWXYwrCTFPRzyg57faXgs9+94olbD9wafq7UoYMwHIsGEf3/pquAQ5NEZnPF1cwu+2QjHS8jp0TOyjhcBMOc/OgxUwF4EoWTSy70jSu1XJMutQDKCUNvPTidLx2njxPyPPF2M+gY= X-MS-TrafficTypeDiagnostic: VI1PR04MB4496: X-Microsoft-Exchange-Diagnostics: 1; VI1PR04MB4496; 20:fkTn3BBcGwVV7iyIc15ATGbzZzTqU9PXgp3pX6PKB3z0pP24hcRDdcMkelE217z3CzYkc7IYIFxxmxn477IoiXv0I1/OtQxMcfL0M+DNcLOglc+ZXgwNPT6pkUszy/CfTo5tXaqX/9z+mFyO9Dn9iPGrHNHsF4i/XJJ4RkLwQ/IpiOY4ueyVdnJ651agCvcSrIg5MlmDD4va8U1ic6Tn7/XiovHSHuKsJc507zBu9dNWQZTxxxt2d8vFUxR4WfvqMfc0mb09RazXJPius5FZtDPJA91tI2Lrz1osRoGnTtWLkEvcUuXUXjjI5Jt6Vgzx3fJuBQnbiCtJYoKl0SrSmN44xAihMcDj+3TAQck+soCJbBJymfskDE2dNYLdGxllKvvyE1dPz6oGmzd5YaaUYEW62bdWsQoXkw42cZlOdvAEY+Rhk7PIg7AYTlYszFaz+gMNc75G5NXbYGJoL7VlGy0thJYecpAgerBeGxAs5uL8ZBqpd53oC4KX5ykMhuP8; 4:aU/Y8RXh/sthU5oPrKqWv9TGSLGhQfSYEz0+N8VFl133uSyKVbf1mjX5pgvj4E/wXsMsBihQ8axk8lVaD1XLotivv+Tds93PYMl9kdb2iaQ2fYW1d997WoBgKuse/ZMzH7L7zRKhzgcGPfFylmr1P2PBCbVu5Ko8wBjwdx8JVYLP7NOSiDsUPNIQy2g0pYx8jyMWxbEsh18tW0IyHWsnZuN6T4xUXxgSvHbVywe6ZwqOZhsfjxvOHmxgLq6OHpxdog8ERFc709oeE1cYv6lM3Z0ys9blRf+9pzt3RZmYorA7FO7vtawYlB/efhZUFttV X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(185117386973197); X-MS-Exchange-SenderADCheck: 1 X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(5005006)(8121501046)(823301075)(93006095)(93001095)(3231311)(944501410)(52105095)(3002001)(10201501046)(6055026)(149027)(150027)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123560045)(20161123562045)(20161123558120)(20161123564045)(201708071742011)(7699016); SRVR:VI1PR04MB4496; BCL:0; PCL:0; RULEID:; SRVR:VI1PR04MB4496; X-Forefront-PRVS: 078693968A X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(396003)(366004)(136003)(376002)(346002)(39860400002)(189003)(199004)(11346002)(305945005)(25786009)(7736002)(386003)(8936002)(478600001)(26005)(36756003)(6116002)(1076002)(3846002)(476003)(446003)(81166006)(50226002)(86362001)(6506007)(47776003)(50466002)(48376002)(8676002)(2616005)(81156014)(956004)(16526019)(186003)(16586007)(66066001)(53936002)(316002)(4326008)(76176011)(68736007)(5660300001)(6512007)(2361001)(51416003)(486006)(106356001)(97736004)(105586002)(6666003)(6486002)(6916009)(44832011)(2351001)(2906002)(52116002); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR04MB4496; H:linux-u7w5.ap.freescale.net.net; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; Received-SPF: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; VI1PR04MB4496; 23:7yQTQdDnlteG/VoUGw7qXPxtsQ6xD5XmH5ovx6aJV?= wP83SpkY1F+JZV430kDvhpbavQcfk/wE9ljoAXcvFNID06UVvGISY6DYcbhaYI25Ivru6aAq3E0r479c317v4YY2srANe2DdQXy+kEI6+IDf6ya5bWht8myDKEvPawyXzCBDSTSp9ektpdaNzfACtWhfET7whHW46NuSxyZzA7HvC3tGBoTDbSOrHT7tNDMS78vaaQcaGuCgBNb2eN2uPShwtQn21+YtusmfPd1Bezf8FaSGbt9Qq3MSmbucJ1LbcV4+NC0Y3QGQv9H4U1Z98OuQ1e/fMpu+04nbOd93dSso0xqzofWUdPiNG2/stc+PzNMSPLAmCjMTTykyTcO6XeWZFcp5gMFe7WnHj/ieivMFefWR8qj7p6o959puX3j5nCd1uTTG106gw9Fd7SscBD9CcRt24n5ky1C6sDb8rv+CH0UiOQ+S4x3E2aHUdHmM921vDRCYg8QcscegV+XAe5/jWSWj4GAysbBbNHgvmv+1HTTiZ3smkKMmaGMgr06YDT6y0HnQDKYcA/LoYoy/9VgfmTaUObvTpX0j7VJ9ElzDMWv+Tf6hNIvOQcQvCctroOVW76RrOOaAv2BZKgshqxBtUAtRVxriGGoiAQXwXjdi3xztCqjr9uepJg+paWhyqc9KPbyr+wzCjW197heh9MTXOeiTEGXSvOtSI2SQHNGsoDuRXdNE0upqxdLAM70MZI73zv9mV1n9RX8CERAN7yDA/am7kDY6nFxzDG++odktXzGUMCjll4bQ3KdsXdjdD5wa9CHDZmZZdR60WZePUoBzXRvvA+ZnbN5vjqOjKKm6CBELCOADS9RKcqsO+CWJePgOmPgaCf0gwIce3jReTSYw/+ZPdMdTWYM7pW1B3w0MSNTIE1m1NypyHlYijTh+wES8iEhkmbaT8sNRDx2DUC8ZT8mhDem+mAMjWCrOZSKwxAY+50jEHnsotHjBHpusCjcfrrD4iJlS37e7Eb8ymp3t1QKuIvZ0APlj4x7Czi3sA7o8LsOLgtMymipGNz78iwMg89VaCWLe4/vTLudwDt2JDWEix35fGT0gWz0Ndos7d1Qb7dIMbpEfAtmw/0PQvwQ8g9QU1v5dnImE5h3KaxQbAAhOi5389xbVdl8gkcxB3IDzG8H5rr1h6ze+A3Tqa5l/mjna8iaTmXcgnS0/M9nlCdEL490WbNZaoQYNSMV7LvmYgAGJocSHvrb9M1brrw= X-Microsoft-Antispam-Message-Info: oq1GPu320VxTkPDLkb7/OLioqfmB4qfiEvVMCiyjec7+Sv4VDZrzqaVLdV06klOId16SWTW2haq+Uq9Yv2tIEXuel5qC8+sCfpuIL6Gv8Cpz40DXHyTDyWh42TFzYlXt/UKPN0AexTZC5h87N2QnIVkIoSpqKBXoW3bgdZPYNUK9xon/Ml2i3/zBXaDRllR8paNywormPC4yJ+P8F7RhEBn9p29dkqd7XP/aQMgWBUWY8tGEkzjUjn+ns17l6ocLAeA5YpPXdJoYzkSTsMgem6mLXUExryj4yf1Q403kkpTkm6xBpvjVr6UCTun9oCF7BKMD4ie/jywdRie7e1lKGN6bXeKdXclrP7WhMHLSYHE= X-Microsoft-Exchange-Diagnostics: 1; VI1PR04MB4496; 6:BEIOz1XHlt8PRs1bClxgiMgsRuh01hOpasAdxM9C4e58fJB4YryRIcbO0EN4kwsyqsPJiT6583pPu6nyUzcqIYIkZijXXtXnmJGH4jKdI2nnqz73bsKMx+MO8C+ewO1LPbDPXGk+g5rBZ4gNG2/Uew+CqRJZBCTJg2UaObW9N+qb2NZ6ufOXpkh1piylywDTLJvGXdEMAA41S9q/TugI6LvLwLPWpLGV56VVKyLwnCxaQxu5hfp2pS1Is96wA4uKosK3VX+jrXQh8oubz0ZoFJAvJyQE1uqA+MhM7uYnqNwICreAQoWh5cnzrkcZ2Qzn4paQdPJs+7JydX11F+PBtH1pANbtzRgXbqwaAqqaisNGI6XwR4eYcNc8IKp2d+RbkXjKIkTfx7uiilC98jfYuGmpFw3FOwPpq98UAaYFpmiCGYk2KTjTATYCSpST/DKPcbtdVyg9BElu2xSB4oTv5g==; 5:/709UzPixRiE2aOYnE3MaM/zQjJcp+TJI6sU9y8qXOzVFPq4eM4dekK5N6GNij7OCWIbjSqdZNgChdIjsvhvdVd/G8sRxeWOgRLkvuGuYGXYcINOjqbaPwsY2dthVk1UUv1hEosnnp6tpXLz5RLngp8CyBZiXQnuzt68yXDjHNg=; 7:ySa0EADq4mMcMYcfhwiRzEvyZpKU/9F7IJMsXkS0P4+yw3WzPKN+IHej5HuIMQ4STiubqYwmjU8NUGUMNqkHkuLoP+NPTnfdfKU93mKDCImmAHcOn75byrsnseHdgzTwrGv+qQPM0euUQ80APlOkAAHufP+My0jMJ/6+xcYDGGZvvsupb6ZC5aiXGpjMNWuHXRVN3W7X06xnIJNcDrV8TOCvwrscy98WP56RQ1NSIn5OsSviHnSo4GPV8XNXgT29 SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Sep 2018 02:07:48.0119 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 902bbba4-a4cd-41a6-d448-08d612d461ea X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB4496 Cc: fabio.estevam@nxp.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH V4 25/32] clk: imx: add clk driver for i.MX8QXP X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add clk driver for i.MX8QXP, support clk enable/disable/get_rate/set_rate operations. Signed-off-by: Peng Fan Cc: Stefano Babic --- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/imx/Kconfig | 6 ++ drivers/clk/imx/Makefile | 5 ++ drivers/clk/imx/clk-imx8.c | 212 +++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 225 insertions(+) create mode 100644 drivers/clk/imx/Kconfig create mode 100644 drivers/clk/imx/Makefile create mode 100644 drivers/clk/imx/clk-imx8.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a99abed9e9..0a535e49d4 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -85,6 +85,7 @@ config CLK_STM32MP1 source "drivers/clk/at91/Kconfig" source "drivers/clk/exynos/Kconfig" +source "drivers/clk/imx/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/owl/Kconfig" source "drivers/clk/renesas/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 034bf44078..f8366fd95e 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o +obj-y += imx/ obj-y += tegra/ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_MESON) += clk_meson.o diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig new file mode 100644 index 0000000000..a6fb58d6cf --- /dev/null +++ b/drivers/clk/imx/Kconfig @@ -0,0 +1,6 @@ +config CLK_IMX8 + bool "Clock support for i.MX8" + depends on ARCH_IMX8 + select CLK + help + This enables support clock driver for i.MX8 platforms. diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile new file mode 100644 index 0000000000..5505ae52e2 --- /dev/null +++ b/drivers/clk/imx/Makefile @@ -0,0 +1,5 @@ +# Copyright 2018 NXP +# +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_CLK_IMX8) += clk-imx8.o diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c new file mode 100644 index 0000000000..ba87ad6964 --- /dev/null +++ b/drivers/clk/imx/clk-imx8.c @@ -0,0 +1,212 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2018 NXP + * Peng Fan + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static ulong imx8_clk_get_rate(struct clk *clk) +{ + sc_pm_clk_t pm_clk; + ulong rate; + u16 resource; + int ret; + + debug("%s(#%ld)\n", __func__, clk->id); + + switch (clk->id) { + case IMX8QXP_A35_DIV: + resource = SC_R_A35; + pm_clk = SC_PM_CLK_CPU; + break; + case IMX8QXP_SDHC0_IPG_CLK: + case IMX8QXP_SDHC0_CLK: + case IMX8QXP_SDHC0_DIV: + resource = SC_R_SDHC_0; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_SDHC1_IPG_CLK: + case IMX8QXP_SDHC1_CLK: + case IMX8QXP_SDHC1_DIV: + resource = SC_R_SDHC_1; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_UART0_IPG_CLK: + case IMX8QXP_UART0_CLK: + resource = SC_R_UART_0; + pm_clk = SC_PM_CLK_PER; + break; + default: + dev_err(dev, "%s(Invalid #%ld)\n", __func__, clk->id); + return -EINVAL; + }; + + ret = sc_pm_get_clock_rate(-1, resource, pm_clk, + (sc_pm_clock_rate_t *)&rate); + if (ret) + printf("%s err %d\n", __func__, ret); + + return rate; +} + +static ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) +{ + sc_pm_clk_t pm_clk; + u32 new_rate = rate; + u16 resource; + int ret; + + debug("%s(#%ld), rate: %lu\n", __func__, clk->id, rate); + + switch (clk->id) { + case IMX8QXP_UART0_CLK: + resource = SC_R_UART_0; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_UART1_CLK: + resource = SC_R_UART_1; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_UART2_CLK: + resource = SC_R_UART_2; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_UART3_CLK: + resource = SC_R_UART_3; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_SDHC0_IPG_CLK: + case IMX8QXP_SDHC0_CLK: + case IMX8QXP_SDHC0_DIV: + resource = SC_R_SDHC_0; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_SDHC1_SEL: + case IMX8QXP_SDHC0_SEL: + return 0; + case IMX8QXP_SDHC1_IPG_CLK: + case IMX8QXP_SDHC1_CLK: + case IMX8QXP_SDHC1_DIV: + resource = SC_R_SDHC_1; + pm_clk = SC_PM_CLK_PER; + break; + default: + printf("%s %ld\n", __func__, clk->id); + return -EINVAL; + }; + + ret = sc_pm_set_clock_rate(-1, resource, pm_clk, &new_rate); + if (ret) + printf("%s err %d\n", __func__, ret); + + return new_rate; +} + +static int __imx8_clk_enable(struct clk *clk, bool enable) +{ + sc_pm_clk_t pm_clk; + u16 resource; + int ret; + + debug("%s(#%ld)\n", __func__, clk->id); + + switch (clk->id) { + case IMX8QXP_I2C0_CLK: + resource = SC_R_I2C_0; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_I2C1_CLK: + resource = SC_R_I2C_1; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_I2C2_CLK: + resource = SC_R_I2C_2; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_I2C3_CLK: + resource = SC_R_I2C_3; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_UART0_CLK: + resource = SC_R_UART_0; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_UART1_CLK: + resource = SC_R_UART_1; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_UART2_CLK: + resource = SC_R_UART_2; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_UART3_CLK: + resource = SC_R_UART_3; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_SDHC0_IPG_CLK: + case IMX8QXP_SDHC0_CLK: + case IMX8QXP_SDHC0_DIV: + resource = SC_R_SDHC_0; + pm_clk = SC_PM_CLK_PER; + break; + case IMX8QXP_SDHC1_IPG_CLK: + case IMX8QXP_SDHC1_CLK: + case IMX8QXP_SDHC1_DIV: + resource = SC_R_SDHC_1; + pm_clk = SC_PM_CLK_PER; + break; + default: + printf("%s not valid resource\n", __func__); + return -EINVAL; + } + + ret = sc_pm_clock_enable(-1, resource, pm_clk, enable, 0); + if (ret) + printf("%s err %d\n", __func__, ret); + + return ret; +} + +static int imx8_clk_disable(struct clk *clk) +{ + return __imx8_clk_enable(clk, 0); +} + +static int imx8_clk_enable(struct clk *clk) +{ + return __imx8_clk_enable(clk, 1); +} + +static struct clk_ops imx8_clk_ops = { + .set_rate = imx8_clk_set_rate, + .get_rate = imx8_clk_get_rate, + .enable = imx8_clk_enable, + .disable = imx8_clk_disable, +}; + +static int imx8_clk_probe(struct udevice *dev) +{ + return 0; +} + +static const struct udevice_id imx8_clk_ids[] = { + { .compatible = "fsl,imx8qxp-clk" }, + { }, +}; + +U_BOOT_DRIVER(imx8_clk) = { + .name = "clk_imx8", + .id = UCLASS_CLK, + .of_match = imx8_clk_ids, + .ops = &imx8_clk_ops, + .probe = imx8_clk_probe, + .flags = DM_FLAG_PRE_RELOC, +};