From patchwork Sun Aug 19 13:57:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 959359 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="WSbOrhPK"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41tfPN2q6gz9s5c for ; Mon, 20 Aug 2018 00:26:00 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 27EEFC21E1A; Sun, 19 Aug 2018 14:07:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 82862C21EA7; Sun, 19 Aug 2018 14:01:25 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AA79CC21E0B; Sun, 19 Aug 2018 14:00:40 +0000 (UTC) Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) by lists.denx.de (Postfix) with ESMTPS id 466F1C21E7F for ; Sun, 19 Aug 2018 14:00:34 +0000 (UTC) Received: by mail-pg1-f195.google.com with SMTP id a11-v6so5542834pgw.6 for ; Sun, 19 Aug 2018 07:00:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OM5KI5Q9+breLXhgRWfW1v4HVvqEt2rzmu+KPnYbGrQ=; b=WSbOrhPKyXA6uv8+7orOMPofretXOxVjE/2Q+QkKlzHankrhhnDQ4FFIHz4fxCgWSl /MpsQ+VTg+DmemMdk+EK25QRkPATjMRBEZ27CeBWn+KlZx9pqz3cBQIbIOq4LbopFpJ6 IJsjbR3mLeUPTy/5NmbuUV8J8IPXRss5TPSxM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OM5KI5Q9+breLXhgRWfW1v4HVvqEt2rzmu+KPnYbGrQ=; b=YJO/ivyhmmS4ezJp0NExgl6tUNboTbRUXYiBq2l2J9Vrc46aoLcJ6EF0qEi2C9lxlC hcdLEjiPQQjd/KdiTIuyCv2AUz8ICgRAd7ifn3QlBUwZfmxl/lYrEF1+kbvKhUu0wlVh 5kAMwIk78rccWn9WB19/wvhqUPL/irUqeZvxph4zn08g3LUJGf5E9oMA5xnj6xv/LKBm aJ7mn2MnlS5R6znKSpguX5nYrTQS59l2Y0kZaadCB15iagLcECvaAdUIib10ekV6Sn1p 0gBlfVQG6yghYsvntNHmTfFASg9i0DQcFlINzYBlvDY6sSQsPS0C+gf/uJhhO7lP3p0s sIaA== X-Gm-Message-State: AOUpUlHTufdV8kOfgg4S+M0v8M+Av++bfy6Cdt+JWN/eY+PE5LGB0UoH kui3q7F3gncDzCKjJRu/87o0yPzFmp0= X-Google-Smtp-Source: AA+uWPx95kRioDIc0ylMXF/xxL5dEssjMUjyNUCQGmVwccfJq3y9/6E8vDvVWwmfxLTu5LhW5Tf6Mw== X-Received: by 2002:a63:380d:: with SMTP id f13-v6mr39727145pga.124.1534687232867; Sun, 19 Aug 2018 07:00:32 -0700 (PDT) Received: from localhost.localdomain ([106.208.36.229]) by smtp.gmail.com with ESMTPSA id l185-v6sm8902816pga.65.2018.08.19.07.00.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 19 Aug 2018 07:00:32 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , Andre Przywara , Chen-Yu Tsai , Icenowy Zheng Date: Sun, 19 Aug 2018 19:27:00 +0530 Message-Id: <20180819135715.15799-44-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20180819135715.15799-1-jagan@amarulasolutions.com> References: <20180819135715.15799-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: Tom Rini , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 43/58] clk: sunxi: Implement SPI resets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Implement SPI resets for all relevant Allwinner SoC clock drivers via reset map descriptor table. Signed-off-by: Jagan Teki --- drivers/clk/sunxi/clk_a31.c | 4 ++++ drivers/clk/sunxi/clk_a64.c | 2 ++ drivers/clk/sunxi/clk_h3.c | 2 ++ drivers/clk/sunxi/clk_v3s.c | 1 + 4 files changed, 9 insertions(+) diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c index 1fa77e1272..a5c6628c63 100644 --- a/drivers/clk/sunxi/clk_a31.c +++ b/drivers/clk/sunxi/clk_a31.c @@ -55,6 +55,10 @@ static struct ccu_reset_map a31_resets[] = { [RST_AHB1_MMC1] = { 0x2c0, BIT(9) }, [RST_AHB1_MMC2] = { 0x2c0, BIT(10) }, [RST_AHB1_MMC3] = { 0x2c0, BIT(11) }, + [RST_AHB1_SPI0] = { 0x2c0, BIT(20) }, + [RST_AHB1_SPI1] = { 0x2c0, BIT(21) }, + [RST_AHB1_SPI2] = { 0x2c0, BIT(22) }, + [RST_AHB1_SPI3] = { 0x2c0, BIT(23) }, [RST_AHB1_OTG] = { 0x2c0, BIT(24) }, [RST_AHB1_EHCI0] = { 0x2c0, BIT(26) }, [RST_AHB1_EHCI1] = { 0x2c0, BIT(27) }, diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index aa2e69d0a3..218d4f09ea 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -47,6 +47,8 @@ static struct ccu_reset_map a64_resets[] = { [RST_BUS_MMC0] = { 0x2c0, BIT(8) }, [RST_BUS_MMC1] = { 0x2c0, BIT(9) }, [RST_BUS_MMC2] = { 0x2c0, BIT(10) }, + [RST_BUS_SPI0] = { 0x2c0, BIT(20) }, + [RST_BUS_SPI1] = { 0x2c0, BIT(21) }, [RST_BUS_OTG] = { 0x2c0, BIT(23) }, [RST_BUS_EHCI0] = { 0x2c0, BIT(24) }, [RST_BUS_EHCI1] = { 0x2c0, BIT(25) }, diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c index 386289b654..f610cee745 100644 --- a/drivers/clk/sunxi/clk_h3.c +++ b/drivers/clk/sunxi/clk_h3.c @@ -54,6 +54,8 @@ static struct ccu_reset_map h3_resets[] = { [RST_BUS_MMC0] = { 0x2c0, BIT(8) }, [RST_BUS_MMC1] = { 0x2c0, BIT(9) }, [RST_BUS_MMC2] = { 0x2c0, BIT(10) }, + [RST_BUS_SPI0] = { 0x2c0, BIT(20) }, + [RST_BUS_SPI1] = { 0x2c0, BIT(21) }, [RST_BUS_OTG] = { 0x2c0, BIT(23) }, [RST_BUS_EHCI0] = { 0x2c0, BIT(24) }, [RST_BUS_EHCI1] = { 0x2c0, BIT(25) }, diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c index 1cca57e065..ae4f6ee066 100644 --- a/drivers/clk/sunxi/clk_v3s.c +++ b/drivers/clk/sunxi/clk_v3s.c @@ -34,6 +34,7 @@ static struct ccu_reset_map v3s_resets[] = { [RST_BUS_MMC0] = { 0x2c0, BIT(8) }, [RST_BUS_MMC1] = { 0x2c0, BIT(9) }, [RST_BUS_MMC2] = { 0x2c0, BIT(10) }, + [RST_BUS_SPI0] = { 0x2c0, BIT(20) }, [RST_BUS_OTG] = { 0x2c0, BIT(24) }, };