From patchwork Mon Jul 16 11:28:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 944336 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="cSDhoNiD"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41ThQg1bNlz9s29 for ; Mon, 16 Jul 2018 21:44:26 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 97C4DC2210F; Mon, 16 Jul 2018 11:38:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 318F8C22185; Mon, 16 Jul 2018 11:30:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 51706C2217D; Mon, 16 Jul 2018 11:30:12 +0000 (UTC) Received: from mail-pl0-f66.google.com (mail-pl0-f66.google.com [209.85.160.66]) by lists.denx.de (Postfix) with ESMTPS id 90930C21F63 for ; Mon, 16 Jul 2018 11:29:58 +0000 (UTC) Received: by mail-pl0-f66.google.com with SMTP id 31-v6so15118246plc.4 for ; Mon, 16 Jul 2018 04:29:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lgYemhddH4uFjr4DI83DP5TtKiw8P7QT9Z4C/Nmo/Js=; b=cSDhoNiDK5HV66ueiStM1+hQu4aJ5cjlZBu91NP0vR2ccCx2ZEYlJBwrntxRbVc7tP +UKUvKO1fmEzF2Khll70wYPaak6VgPZhVM+EJLHaJ7uelAIT/CyHmiNYgJc6LHhSNSVC 0zFNZopltLLP1P6KG7YYvJPAtdwzo6dH609pg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lgYemhddH4uFjr4DI83DP5TtKiw8P7QT9Z4C/Nmo/Js=; b=edlS/33X2bXGD9XPo9DYh1iecbEXIEOnOEPmL6zaioL4aAJT6Ps+vG7TgWccai5XTl xOHHp4D+EX2YXvG/eXqvQoV5Cu0xgJFG8makP1gtpyHxv3DrUix9A0rc+NuJead+dDK9 0AywRfp97mgFi7QbSIq8xJ+/AasKJ+yrmIelxR2dXm/ABUSPm2w2Mdx3HC9InQvBKQ7r rlCZJjhncs1pOCOLnvRjg/8OwhHQOaFB/UNX4dRvl09lnrpjkcGp3Ayn4dSLboF3jjJv 3EQtBCF4S/A8xzEAisZJwZkge/LyfGhwatGU4C8DIso6d1gnUYfUmy+6I6q/l/PQvr+j Di4Q== X-Gm-Message-State: AOUpUlG7iZJjfu6ns4Z9wFGEKW2R2jA3s3NyswWv6Y/8OdKI2KhxAnze u1dODzmpqm55xllpPcuzdGZkbw== X-Google-Smtp-Source: AAOMgpdu8x3f1nNaWZKJodFRodgGitfBJQDbBOEspXSZ3piYINlDOsMkL5UyjRBdgvJuITk5xv/9Ww== X-Received: by 2002:a17:902:9b98:: with SMTP id y24-v6mr16096969plp.177.1531740597197; Mon, 16 Jul 2018 04:29:57 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.161]) by smtp.gmail.com with ESMTPSA id u9-v6sm20817464pfi.4.2018.07.16.04.29.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 16 Jul 2018 04:29:56 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , Andre Przywara Date: Mon, 16 Jul 2018 16:58:35 +0530 Message-Id: <20180716112850.3961-21-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180716112850.3961-1-jagan@amarulasolutions.com> References: <20180716112850.3961-1-jagan@amarulasolutions.com> Cc: Tom Rini , u-boot@lists.denx.de Subject: [U-Boot] [RFC 20/35] reset: sunxi: Add initial RESET driver for A10/A20 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add initial reset driver for Allwinner A10/A20. Implement reset deassert and assert functions for USB OHCI, EHCI, OTG and PHY bus reset and clock registers. Signed-off-by: Jagan Teki --- drivers/reset/sunxi/Kconfig | 7 +++ drivers/reset/sunxi/Makefile | 1 + drivers/reset/sunxi/reset_a10.c | 95 +++++++++++++++++++++++++++++++++ 3 files changed, 103 insertions(+) create mode 100644 drivers/reset/sunxi/reset_a10.c diff --git a/drivers/reset/sunxi/Kconfig b/drivers/reset/sunxi/Kconfig index 5c3b79eb76..523201a4e9 100644 --- a/drivers/reset/sunxi/Kconfig +++ b/drivers/reset/sunxi/Kconfig @@ -9,6 +9,13 @@ config RESET_SUNXI if RESET_SUNXI +config RESET_SUN4I_A10 + bool "Reset driver for Allwinner A10/A20" + default MACH_SUN4I || MACH_SUN7I + help + This enables common reset driver support for platforms based + on Allwinner A10/A20 SoC. + config RESET_SUN8I_H3 bool "Reset driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/reset/sunxi/Makefile b/drivers/reset/sunxi/Makefile index 6e4273b344..6dc0520b6a 100644 --- a/drivers/reset/sunxi/Makefile +++ b/drivers/reset/sunxi/Makefile @@ -4,5 +4,6 @@ # SPDX-License-Identifier: GPL-2.0+ # +obj-$(CONFIG_RESET_SUN4I_A10) += reset_a10.o obj-$(CONFIG_RESET_SUN8I_H3) += reset_h3.o obj-$(CONFIG_RESET_SUN50I_A64) += reset_a64.o diff --git a/drivers/reset/sunxi/reset_a10.c b/drivers/reset/sunxi/reset_a10.c new file mode 100644 index 0000000000..d964ea42e8 --- /dev/null +++ b/drivers/reset/sunxi/reset_a10.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Amarula Solutions B.V. + * Author: Jagan Teki + */ + +#include +#include +#include +#include +#include +#include +#include + +struct a10_reset_priv { + void *base; +}; + +static int a10_reset_request(struct reset_ctl *reset_ctl) +{ + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + /* check dt-bindings/reset/sun4i-a10-ccu.h for max id */ + if (reset_ctl->id > 22) + return -EINVAL; + + return 0; +} + +static int a10_reset_free(struct reset_ctl *reset_ctl) +{ + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + return 0; +} + +static int a10_reset_assert(struct reset_ctl *reset_ctl) +{ + struct a10_reset_priv *priv = dev_get_priv(reset_ctl->dev); + + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + switch (reset_ctl->id) { + case RST_USB_PHY0: + case RST_USB_PHY1: + case RST_USB_PHY2: + clrbits_le32(priv->base + 0x0cc, BIT(reset_ctl->id)); + return 0; + default: + debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id); + return -ENODEV; + } +} + +static int a10_reset_deassert(struct reset_ctl *reset_ctl) +{ + struct a10_reset_priv *priv = dev_get_priv(reset_ctl->dev); + + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + switch (reset_ctl->id) { + case RST_USB_PHY0: + case RST_USB_PHY1: + case RST_USB_PHY2: + setbits_le32(priv->base + 0x0cc, BIT(reset_ctl->id)); + return 0; + default: + debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id); + return -ENODEV; + } +} + +struct reset_ops a10_reset_ops = { + .request = a10_reset_request, + .free = a10_reset_free, + .rst_assert = a10_reset_assert, + .rst_deassert = a10_reset_deassert, +}; + +static int a10_reset_probe(struct udevice *dev) +{ + struct a10_reset_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + + return 0; +} + +U_BOOT_DRIVER(reset_sun4i_a10) = { + .name = "sun4i_a10_reset", + .id = UCLASS_RESET, + .ops = &a10_reset_ops, + .probe = a10_reset_probe, + .priv_auto_alloc_size = sizeof(struct a10_reset_priv), +};