From patchwork Fri Jun 22 16:06:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Agner X-Patchwork-Id: 933486 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=agner.ch Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; secure) header.d=agner.ch header.i=@agner.ch header.b="VKUVy7Hd"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41C3PM6bfCz9s01 for ; Sat, 23 Jun 2018 02:07:35 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 978D0C21E3A; Fri, 22 Jun 2018 16:07:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9FE36C21F49; Fri, 22 Jun 2018 16:06:48 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 045CAC21F1F; Fri, 22 Jun 2018 16:06:45 +0000 (UTC) Received: from mail.kmu-office.ch (mail.kmu-office.ch [178.209.48.109]) by lists.denx.de (Postfix) with ESMTPS id 74FCCC21C2C for ; Fri, 22 Jun 2018 16:06:45 +0000 (UTC) Received: from trochilidae.toradex.int (unknown [IPv6:2a02:169:34d6:10::3]) by mail.kmu-office.ch (Postfix) with ESMTPSA id 4D0525C1AE1; Fri, 22 Jun 2018 18:06:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim; t=1529683602; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:content-type:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PDdlMIz4LmdzS2IgGe2Kag1EmO6uMb07KzrFu0ssgso=; b=VKUVy7Hde6rD+0M+pFbyGD2oQ17u/suH+Qhngf+UouE6p94mFR3I0c56CM3LXmbLVVEI5D Ggc7pze1l8AVy8aR6xVqHXXvSNqRIoR8KQ6DBCK6J0mMlahWnDfErlb6fi/CcBsVLJIbXg 69Ia5KvXaj8xnqlIkROkT+JAT4AGajA= From: Stefan Agner To: u-boot@lists.denx.de, Stefano Babic , oss@buserror.net Date: Fri, 22 Jun 2018 18:06:15 +0200 Message-Id: <20180622160620.20277-5-stefan@agner.ch> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622160620.20277-1-stefan@agner.ch> References: <20180622160620.20277-1-stefan@agner.ch> X-Spamd-Result: default: False [-2.10 / 15.00]; TO_MATCH_ENVRCPT_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%]; MIME_GOOD(-0.10)[text/plain]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_SEVEN(0.00)[10]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_COUNT_ZERO(0.00)[0]; MID_CONTAINS_FROM(1.00)[]; ASN(0.00)[asn:13030, ipnet:2a02:169::/32, country:CH]; RCVD_TLS_ALL(0.00)[]; ARC_NA(0.00)[] Cc: marex@denx.de, Stefan Agner , Marcel Ziswiler , Max Krummenacher , fabio.estevam@nxp.com, han.xu@nxp.com Subject: [U-Boot] [PATCH v2 4/9] mtd: nand: mxs_nand: add use_minimum_ecc to struct X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Stefan Agner Add use_minimum_ecc as struct mxs_nand_info field in preparation for device tree support. Signed-off-by: Stefan Agner --- Changes in v2: None drivers/mtd/nand/mxs_nand.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index bb40237362..3c9ee07be5 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -71,6 +71,8 @@ struct bch_geometry { struct mxs_nand_info { struct nand_chip chip; + unsigned int max_ecc_strength_supported; + bool use_minimum_ecc; int cur_chip; uint32_t cmd_queue_len; @@ -215,19 +217,11 @@ static inline int mxs_nand_calc_mark_offset(struct bch_geometry *geo, return 0; } -static inline unsigned int mxs_nand_max_ecc_strength_supported(void) -{ - /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */ - if (is_mx6sx() || is_mx7()) - return 62; - else - return 40; -} - static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo, struct mtd_info *mtd) { struct nand_chip *chip = mtd_to_nand(mtd); + struct mxs_nand_info *nand_info = nand_get_controller_data(chip); if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) return -ENOTSUPP; @@ -250,7 +244,7 @@ static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo, if (geo->ecc_chunk_size < mtd->oobsize) return -EINVAL; - if (geo->ecc_strength > mxs_nand_max_ecc_strength_supported()) + if (geo->ecc_strength > nand_info->max_ecc_strength_supported) return -EINVAL; geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; @@ -261,6 +255,9 @@ static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo, static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo, struct mtd_info *mtd) { + struct nand_chip *chip = mtd_to_nand(mtd); + struct mxs_nand_info *nand_info = nand_get_controller_data(chip); + /* The default for the length of Galois Field. */ geo->gf_len = 13; @@ -292,7 +289,7 @@ static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo, / (geo->gf_len * geo->ecc_chunk_count); geo->ecc_strength = min(round_down(geo->ecc_strength, 2), - mxs_nand_max_ecc_strength_supported()); + nand_info->max_ecc_strength_supported); return 0; } @@ -1042,9 +1039,8 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd) uint32_t tmp; int ret = -ENOTSUPP; -#ifdef CONFIG_NAND_MXS_USE_MINIMUM_ECC - ret = mxs_nand_calc_ecc_layout_by_info(geo, mtd); -#endif + if (nand_info->use_minimum_ecc) + ret = mxs_nand_calc_ecc_layout_by_info(geo, mtd); if (ret == -ENOTSUPP) ret = mxs_nand_calc_ecc_layout(geo, mtd); @@ -1322,6 +1318,16 @@ void board_nand_init(void) nand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE; nand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE; + /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */ + if (is_mx6sx() || is_mx7()) + nand_info->max_ecc_strength_supported = 62; + else + nand_info->max_ecc_strength_supported = 40; + +#ifdef CONFIG_NAND_MXS_USE_MINIMUM_ECC + nand_info->use_minimum_ecc = true; +#endif + if (mxs_nand_init(nand_info) < 0) goto err;