From patchwork Mon May 7 07:33:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 909559 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="X0SrFclk"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40fZFb5ssPz9ryk for ; Mon, 7 May 2018 17:37:07 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 6E319C220BE; Mon, 7 May 2018 07:35:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,RCVD_IN_SORBS_WEB,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 47A3EC22063; Mon, 7 May 2018 07:34:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B04FCC2206C; Mon, 7 May 2018 07:34:18 +0000 (UTC) Received: from mail-pg0-f67.google.com (mail-pg0-f67.google.com [74.125.83.67]) by lists.denx.de (Postfix) with ESMTPS id 5F28BC22073 for ; Mon, 7 May 2018 07:34:14 +0000 (UTC) Received: by mail-pg0-f67.google.com with SMTP id a13-v6so19612674pgu.4 for ; Mon, 07 May 2018 00:34:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rKOHY5N6wdNY9uT7gAGhzJR3K5EHoIjJPeIoAv0wbdw=; b=X0SrFclkFLGwiKG9U+zpzuF6ZtyuaIzPFlH368C+d9/wgL7vdBPvtL1jJpRkI9NIC7 cY5f3kyf0MuLX25XdJtVV/hgkztkkbtWqlwLgFo9NPhMVWkmdU0c1kCtHmVweQifs9is +Xn9j16WEy1SiNB3rmbbI6wsqdNkfedri7IMg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rKOHY5N6wdNY9uT7gAGhzJR3K5EHoIjJPeIoAv0wbdw=; b=lyismUGiW94naG/HJiAMiQ6oYly7phOzDURe1Py3BNzMKtOFFDIlAAsNCmz3gnuRVZ c9ofKWf0Ac6g+RSNx2+DSPtFR0s3CjDIK6ieHvE+8u/4gSdnPoCeQCYy9BO2+RdnZbvf c8+iebG9Uf0Yk9RRPuT5nagW/sE4eWiPe//Vpjxaga1lBDsoINXlmZmLa19ILPRnS+w1 8S34Z03jtNDJ+0dSOJKWKRddOL+x3qPQIQujepHvcnM37MmzNHMHqBIKcOrKSOPJyle/ Vlf9a6vOWgROyeNWgwmodM+M61cVhi1BmQnwN2krqoH9kz1WYDcBN1MHcA6wESPrInla XfUA== X-Gm-Message-State: ALQs6tBKx/jC5CtU5VWvT9Q3SJYrDHO+MIbyAD48J9oCog1C19+x1b4z dOjhXUqdF4jRoMH78ieWtVQjG83Z5HQ= X-Google-Smtp-Source: AB8JxZpfv7jETbnglETalsQYywXymWos5BI3yD2lgMOXlfHWxoQWs8IaWJSjZwz46L/bi4ojtnqiiw== X-Received: by 10.98.253.18 with SMTP id p18mr17147088pfh.152.1525678452847; Mon, 07 May 2018 00:34:12 -0700 (PDT) Received: from localhost.localdomain ([183.82.228.172]) by smtp.gmail.com with ESMTPSA id 76sm59400891pfm.178.2018.05.07.00.34.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 07 May 2018 00:34:12 -0700 (PDT) From: Jagan Teki To: u-boot@lists.denx.de Date: Mon, 7 May 2018 13:03:20 +0530 Message-Id: <20180507073351.30582-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180507073351.30582-1-jagan@amarulasolutions.com> References: <20180507073351.30582-1-jagan@amarulasolutions.com> Cc: Maxime Ripard , Marek Vasut , linux-sunxi@googlegroups.com Subject: [U-Boot] [PATCH v7 04/35] musb: sunxi: Add fifo config X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Unlike other Allwinner SOC's H3/H5/V3s OTG support 4 endpoints with relevant fifo configs, rest all have 5 endpoints. So add the fifo configs and defer them based on driver_data. Signed-off-by: Jagan Teki --- drivers/usb/musb-new/sunxi.c | 70 ++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 65 insertions(+), 5 deletions(-) diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 637e8b9b52..af0dbc5a20 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -76,9 +76,14 @@ * From usbc/usbc.c ******************************************************************************/ +struct sunxi_musb_config { + struct musb_hdrc_config *config; +}; + struct sunxi_glue { struct musb_host_data mdata; struct sunxi_ccm_reg *ccm; + struct sunxi_musb_config *cfg; struct device dev; }; #define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev) @@ -301,13 +306,52 @@ static const struct musb_platform_ops sunxi_musb_ops = { #define SUNXI_MUSB_MAX_EP_NUM 6 #define SUNXI_MUSB_RAM_BITS 11 +static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = { + MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(5, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512), +}; + +/* H3/V3s OTG supports only 4 endpoints */ +#define SUNXI_MUSB_MAX_EP_NUM_H3 5 + +static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = { + MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512), +}; + static struct musb_hdrc_config musb_config = { + .fifo_cfg = sunxi_musb_mode_cfg, + .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg), .multipoint = true, .dyn_fifo = true, .num_eps = SUNXI_MUSB_MAX_EP_NUM, .ram_bits = SUNXI_MUSB_RAM_BITS, }; +static struct musb_hdrc_config musb_config_h3 = { + .fifo_cfg = sunxi_musb_mode_cfg_h3, + .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_h3), + .multipoint = true, + .dyn_fifo = true, + .soft_con = true, + .num_eps = SUNXI_MUSB_MAX_EP_NUM_H3, + .ram_bits = SUNXI_MUSB_RAM_BITS, +}; + static int musb_usb_probe(struct udevice *dev) { struct sunxi_glue *glue = dev_get_priv(dev); @@ -320,6 +364,10 @@ static int musb_usb_probe(struct udevice *dev) if (!base) return -EINVAL; + glue->cfg = (struct sunxi_musb_config *)dev_get_driver_data(dev); + if (!glue->cfg) + return -EINVAL; + glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; if (IS_ERR(glue->ccm)) return PTR_ERR(glue->ccm); @@ -329,7 +377,7 @@ static int musb_usb_probe(struct udevice *dev) memset(&pdata, 0, sizeof(pdata)); pdata.power = 250; pdata.platform_ops = &sunxi_musb_ops; - pdata.config = &musb_config; + pdata.config = glue->cfg->config; #ifdef CONFIG_USB_MUSB_HOST pdata.mode = MUSB_HOST; @@ -369,11 +417,23 @@ static int musb_usb_remove(struct udevice *dev) return 0; } +static const struct sunxi_musb_config sun4i_a10_cfg = { + .config = &musb_config, +}; + +static const struct sunxi_musb_config sun8i_h3_cfg = { + .config = &musb_config_h3, +}; + static const struct udevice_id sunxi_musb_ids[] = { - { .compatible = "allwinner,sun4i-a10-musb" }, - { .compatible = "allwinner,sun6i-a31-musb" }, - { .compatible = "allwinner,sun8i-a33-musb" }, - { .compatible = "allwinner,sun8i-h3-musb" }, + { .compatible = "allwinner,sun4i-a10-musb", + .data = (ulong)&sun4i_a10_cfg }, + { .compatible = "allwinner,sun6i-a31-musb", + .data = (ulong)&sun4i_a10_cfg }, + { .compatible = "allwinner,sun8i-a33-musb", + .data = (ulong)&sun4i_a10_cfg }, + { .compatible = "allwinner,sun8i-h3-musb", + .data = (ulong)&sun8i_h3_cfg }, { } };