From patchwork Wed Apr 18 13:40:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 900129 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40R3Js03l4z9s3W for ; Wed, 18 Apr 2018 23:45:00 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id C45D8C21DA1; Wed, 18 Apr 2018 13:41:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6ECD4C21EE4; Wed, 18 Apr 2018 13:40:39 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6CFCFC21C8B; Wed, 18 Apr 2018 13:40:34 +0000 (UTC) Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by lists.denx.de (Postfix) with ESMTPS id D8478C21E30 for ; Wed, 18 Apr 2018 13:40:33 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 4D98EAF59; Wed, 18 Apr 2018 13:40:33 +0000 (UTC) From: Alexander Graf To: u-boot@lists.denx.de Date: Wed, 18 Apr 2018 15:40:23 +0200 Message-Id: <20180418134030.55127-2-agraf@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20180418134030.55127-1-agraf@suse.de> References: <20180418134030.55127-1-agraf@suse.de> Cc: Heinrich Schuchardt , Greentime Hu Subject: [U-Boot] [PATCH 1/8] riscv: Add setjmp/longjmp code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" To support efi_loader we need to have platform support for setjmp/longjmp. Add it here. Signed-off-by: Alexander Graf --- arch/riscv/include/asm/setjmp.h | 24 ++++++++++++++++++ arch/riscv/lib/Makefile | 1 + arch/riscv/lib/setjmp.S | 54 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 79 insertions(+) create mode 100644 arch/riscv/include/asm/setjmp.h create mode 100644 arch/riscv/lib/setjmp.S diff --git a/arch/riscv/include/asm/setjmp.h b/arch/riscv/include/asm/setjmp.h new file mode 100644 index 0000000000..37e8281aaa --- /dev/null +++ b/arch/riscv/include/asm/setjmp.h @@ -0,0 +1,24 @@ +/* + * (C) Copyright 2018 Alexander Graf + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SETJMP_H_ +#define _SETJMP_H_ 1 + +/* + * This really should be opaque, but the EFI implementation wrongly + * assumes that a 'struct jmp_buf_data' is defined. + */ +struct jmp_buf_data { + /* x2, x8, x9, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27 */ + u64 regs[13]; +}; + +typedef struct jmp_buf_data jmp_buf[1]; + +int setjmp(jmp_buf jmp); +void longjmp(jmp_buf jmp, int ret); + +#endif /* _SETJMP_H_ */ diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 323cf3e835..6d97aa2719 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o obj-y += interrupts.o +obj-y += setjmp.o diff --git a/arch/riscv/lib/setjmp.S b/arch/riscv/lib/setjmp.S new file mode 100644 index 0000000000..55c5128163 --- /dev/null +++ b/arch/riscv/lib/setjmp.S @@ -0,0 +1,54 @@ +/* + * (C) 2018 Alexander Graf + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +.pushsection .text.setjmp, "ax" +ENTRY(setjmp) + /* Preserve all callee-saved registers and the SP */ + sd s0, 0(a0) + sd s1, 8(a0) + sd s2, 16(a0) + sd s3, 24(a0) + sd s4, 32(a0) + sd s5, 40(a0) + sd s6, 48(a0) + sd s7, 56(a0) + sd s8, 64(a0) + sd s9, 72(a0) + sd s10, 80(a0) + sd s11, 88(a0) + li a0, 0 + ret +ENDPROC(setjmp) +.popsection + +.pushsection .text.longjmp, "ax" +ENTRY(longjmp) + ld s0, 0(a0) + ld s1, 8(a0) + ld s2, 16(a0) + ld s3, 24(a0) + ld s4, 32(a0) + ld s5, 40(a0) + ld s6, 48(a0) + ld s7, 56(a0) + ld s8, 64(a0) + ld s9, 72(a0) + ld s10, 80(a0) + ld s11, 88(a0) + + /* Move the return value in place, but return 1 if passed 0. */ + beq a1, zero, longjmp_1 + mv a0, a1 + ret + + longjmp_1: + li a0, 1 + ret +ENDPROC(longjmp) +.popsection