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[U-Boot,5/5] spl: socfpga: Generate Arria10 SFP header V1

Message ID 20180415133704.18950-5-marex@denx.de
State Accepted
Commit 792557d1110e13f82ee66dab57c5dca2102744da
Delegated to: Marek Vasut
Headers show
Series [U-Boot,1/5] ARM: socfpga: Add boot trampoline for Arria10 | expand

Commit Message

Marek Vasut April 15, 2018, 1:37 p.m. UTC 
Generate SoCFPGA boot header version 1 instead of version 0 for Arria10.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Chin Liang See <chin.liang.see@intel.com>
---
 scripts/Makefile.spl | 4 ++++
 1 file changed, 4 insertions(+)

Comments

See, Chin Liang April 17, 2018, 8:54 a.m. UTC | #1 
On Sun, 2018-04-15 at 15:37 +0200, Marek Vasut wrote:
> Generate SoCFPGA boot header version 1 instead of version 0 for
> Arria10.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Dinh Nguyen <dinguyen@kernel.org>
> Cc: Chin Liang See <chin.liang.see@intel.com>
> ---
>  scripts/Makefile.spl | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Acked-by: Chin Liang See <chin.liang.see@intel.com>
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Patch

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 2993ade41e..5d9adda996 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -309,7 +309,11 @@  LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
 endif
 endif
 
+ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
+MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage_v1
+else
 MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage
+endif
 $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
 	$(call if_changed,mkimage)